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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_bus.h Source File</title>
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<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_ll_bus.h</div></div>
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<a href="stm32h7xx__ll__bus_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span></div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span> </div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span><span class="comment">/* Define to prevent recursive inclusion -------------------------------------*/</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span><span class="preprocessor">#ifndef STM32H7xx_LL_BUS_H</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span><span class="preprocessor">#define STM32H7xx_LL_BUS_H</span></div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span> </div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span><span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span> </div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span><span class="comment">/* Includes ------------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span><span class="preprocessor">#include &quot;<a class="code" href="stm32h7xx_8h.html">stm32h7xx.h</a>&quot;</span></div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno">   45</span></div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno">   49</span> </div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span><span class="preprocessor">#if defined(RCC)</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span> </div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="comment">/* Private variables ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span> </div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span><span class="comment">/* Private constants ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span> </div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span><span class="comment">/* Private macros ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span> </div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span><span class="comment">/* Exported types ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span> </div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span><span class="comment">/* Exported constants --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_MDMA           RCC_AHB3ENR_MDMAEN</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_DMA2D          RCC_AHB3ENR_DMA2DEN</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span> </div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span><span class="preprocessor">#if defined(JPEG)</span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_JPGDEC         RCC_AHB3ENR_JPGDECEN</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span><span class="preprocessor">#endif </span><span class="comment">/* JPEG */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span> </div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_FMC            RCC_AHB3ENR_FMCEN</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">#if defined(QUADSPI)</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_QSPI           RCC_AHB3ENR_QSPIEN</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="preprocessor">#endif </span><span class="comment">/* QUADSPI */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">#if defined(OCTOSPI1) || defined(OCTOSPI2)</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_OSPI1          RCC_AHB3ENR_OSPI1EN</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_OSPI2          RCC_AHB3ENR_OSPI2EN</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="preprocessor">#endif </span><span class="comment">/*(OCTOSPI1) || (OCTOSPI2)*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span><span class="preprocessor">#if defined(OCTOSPIM)</span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_OCTOSPIM       RCC_AHB3ENR_IOMNGREN</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="preprocessor">#endif </span><span class="comment">/* OCTOSPIM */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span><span class="preprocessor">#if defined(OTFDEC1) || defined(OTFDEC2)</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_OTFDEC1        RCC_AHB3ENR_OTFDEC1EN</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_OTFDEC2        RCC_AHB3ENR_OTFDEC2EN</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">#endif </span><span class="comment">/* (OTFDEC1) || (OTFDEC2) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="preprocessor">#if defined(GFXMMU)</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_GFXMMU         RCC_AHB3ENR_GFXMMUEN</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">#endif </span><span class="comment">/* GFXMMU */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_SDMMC1         RCC_AHB3ENR_SDMMC1EN</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_FLASH          RCC_AHB3LPENR_FLASHLPEN</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_DTCM1          RCC_AHB3LPENR_DTCM1LPEN</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_DTCM2          RCC_AHB3LPENR_DTCM2LPEN</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_ITCM           RCC_AHB3LPENR_ITCMLPEN</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="preprocessor">#if defined(RCC_AHB3LPENR_AXISRAMLPEN)</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_AXISRAM        RCC_AHB3LPENR_AXISRAMLPEN</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_AXISRAM1       RCC_AHB3LPENR_AXISRAM1LPEN</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_AXISRAM        LL_AHB3_GRP1_PERIPH_AXISRAM1   </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB3LPENR_AXISRAMLPEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">#if defined(CD_AXISRAM2_BASE)</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_AXISRAM2       RCC_AHB3LPENR_AXISRAM2LPEN</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">#endif </span><span class="comment">/* CD_AXISRAM2_BASE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span><span class="preprocessor">#if defined(CD_AXISRAM3_BASE)</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">#define LL_AHB3_GRP1_PERIPH_AXISRAM3       RCC_AHB3LPENR_AXISRAM3LPEN</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">#endif </span><span class="comment">/* CD_AXISRAM3_BASE */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span> </div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span></div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_DMA1           RCC_AHB1ENR_DMA1EN</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_DMA2           RCC_AHB1ENR_DMA2EN</span></div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_ADC12          RCC_AHB1ENR_ADC12EN</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span><span class="preprocessor">#if defined(DUAL_CORE)</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_ART            RCC_AHB1ENR_ARTEN</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">#if defined(RCC_AHB1ENR_CRCEN)</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_CRC            RCC_AHB1ENR_CRCEN</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB1ENR_CRCEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span><span class="preprocessor">#if defined(ETH)</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_ETH1MAC        RCC_AHB1ENR_ETH1MACEN</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_ETH1TX         RCC_AHB1ENR_ETH1TXEN</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_ETH1RX         RCC_AHB1ENR_ETH1RXEN</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span><span class="preprocessor">#endif </span><span class="comment">/* ETH */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_USB1OTGHS      RCC_AHB1ENR_USB1OTGHSEN</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI  RCC_AHB1ENR_USB1OTGHSULPIEN</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">#if defined(USB2_OTG_FS)</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_USB2OTGHS      RCC_AHB1ENR_USB2OTGHSEN</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">#define LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI  RCC_AHB1ENR_USB2OTGHSULPIEN</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">#endif </span><span class="comment">/* USB2_OTG_FS */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span> </div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_DCMI           RCC_AHB2ENR_DCMIEN</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="preprocessor">#if defined(HSEM) &amp;&amp; defined(RCC_AHB2ENR_HSEMEN)</span></div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_HSEM           RCC_AHB2ENR_HSEMEN</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span><span class="preprocessor">#endif </span><span class="comment">/* HSEM &amp;&amp; RCC_AHB2ENR_HSEMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="preprocessor">#if defined(CRYP)</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_CRYP           RCC_AHB2ENR_CRYPEN</span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="preprocessor">#endif </span><span class="comment">/* CRYP */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="preprocessor">#if defined(HASH)</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_HASH           RCC_AHB2ENR_HASHEN</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="preprocessor">#endif </span><span class="comment">/* HASH */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_RNG            RCC_AHB2ENR_RNGEN</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_SDMMC2         RCC_AHB2ENR_SDMMC2EN</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="preprocessor">#if defined(FMAC)</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_FMAC           RCC_AHB2ENR_FMACEN</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span><span class="preprocessor">#endif </span><span class="comment">/* FMAC */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span><span class="preprocessor">#if defined(CORDIC)</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_CORDIC         RCC_AHB2ENR_CORDICEN</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="preprocessor">#endif </span><span class="comment">/* CORDIC */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="preprocessor">#if defined(BDMA1)</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_BDMA1          RCC_AHB2ENR_BDMA1EN</span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="preprocessor">#endif </span><span class="comment">/* BDMA1 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span><span class="preprocessor">#if defined(RCC_AHB2ENR_D2SRAM1EN)</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_D2SRAM1        RCC_AHB2ENR_D2SRAM1EN</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_AHBSRAM1       RCC_AHB2ENR_AHBSRAM1EN</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_D2SRAM1        LL_AHB2_GRP1_PERIPH_AHBSRAM1    </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB2ENR_D2SRAM1EN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="preprocessor">#if defined(RCC_AHB2ENR_D2SRAM2EN)</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_D2SRAM2        RCC_AHB2ENR_D2SRAM2EN</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_AHBSRAM2       RCC_AHB2ENR_AHBSRAM2EN</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_D2SRAM2        LL_AHB2_GRP1_PERIPH_AHBSRAM2    </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB2ENR_D2SRAM2EN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">#if defined(RCC_AHB2ENR_D2SRAM3EN)</span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">#define LL_AHB2_GRP1_PERIPH_D2SRAM3        RCC_AHB2ENR_D2SRAM3EN</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB2ENR_D2SRAM3EN */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span> </div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOA          RCC_AHB4ENR_GPIOAEN</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOB          RCC_AHB4ENR_GPIOBEN</span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOC          RCC_AHB4ENR_GPIOCEN</span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOD          RCC_AHB4ENR_GPIODEN</span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOE          RCC_AHB4ENR_GPIOEEN</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOF          RCC_AHB4ENR_GPIOFEN</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOG          RCC_AHB4ENR_GPIOGEN</span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOH          RCC_AHB4ENR_GPIOHEN</span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span><span class="preprocessor">#if defined(GPIOI)</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOI          RCC_AHB4ENR_GPIOIEN</span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span><span class="preprocessor">#endif </span><span class="comment">/* GPIOI */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOJ          RCC_AHB4ENR_GPIOJEN</span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_GPIOK          RCC_AHB4ENR_GPIOKEN</span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span><span class="preprocessor">#if defined(RCC_AHB4ENR_CRCEN)</span></div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno">  208</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_CRC            RCC_AHB4ENR_CRCEN</span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB4ENR_CRCEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span><span class="preprocessor">#if defined(BDMA2)</span></div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_BDMA2          RCC_AHB4ENR_BDMA2EN</span></div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_BDMA           LL_AHB4_GRP1_PERIPH_BDMA2  </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_BDMA           RCC_AHB4ENR_BDMAEN</span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span><span class="preprocessor">#endif </span><span class="comment">/* BDMA2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span><span class="preprocessor">#if defined(ADC3)</span></div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno">  217</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_ADC3           RCC_AHB4ENR_ADC3EN</span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span><span class="preprocessor">#endif </span><span class="comment">/* ADC3 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno">  219</span><span class="preprocessor">#if defined(HSEM) &amp;&amp; defined(RCC_AHB4ENR_HSEMEN)</span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_HSEM           RCC_AHB4ENR_HSEMEN</span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span><span class="preprocessor">#endif </span><span class="comment">/* HSEM &amp;&amp; RCC_AHB4ENR_HSEMEN*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_BKPRAM         RCC_AHB4ENR_BKPRAMEN</span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span><span class="preprocessor">#if defined(RCC_AHB4LPENR_SRAM4LPEN)</span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_SRAM4          RCC_AHB4LPENR_SRAM4LPEN</span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_D3SRAM1        LL_AHB4_GRP1_PERIPH_SRAM4</span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno">  226</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_SRDSRAM        RCC_AHB4ENR_SRDSRAMEN</span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_SRAM4          LL_AHB4_GRP1_PERIPH_SRDSRAM  </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span><span class="preprocessor">#define LL_AHB4_GRP1_PERIPH_D3SRAM1        LL_AHB4_GRP1_PERIPH_SRDSRAM  </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_AHB4ENR_D3SRAM1EN */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span> </div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span><span class="preprocessor">#if defined(LTDC)</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span><span class="preprocessor">#define LL_APB3_GRP1_PERIPH_LTDC           RCC_APB3ENR_LTDCEN</span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span><span class="preprocessor">#endif </span><span class="comment">/* LTDC */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span><span class="preprocessor">#if defined(DSI)</span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span><span class="preprocessor">#define LL_APB3_GRP1_PERIPH_DSI            RCC_APB3ENR_DSIEN</span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span><span class="preprocessor">#endif </span><span class="comment">/* DSI */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno">  245</span><span class="preprocessor">#define LL_APB3_GRP1_PERIPH_WWDG1          RCC_APB3ENR_WWDG1EN</span></div>
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno">  246</span><span class="preprocessor">#if defined(RCC_APB3ENR_WWDGEN)</span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span><span class="preprocessor">#define LL_APB3_GRP1_PERIPH_WWDG           LL_APB3_GRP1_PERIPH_WWDG1   </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_APB3ENR_WWDGEN */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span> </div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM2           RCC_APB1LENR_TIM2EN</span></div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM3           RCC_APB1LENR_TIM3EN</span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM4           RCC_APB1LENR_TIM4EN</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM5           RCC_APB1LENR_TIM5EN</span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1LENR_TIM6EN</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1LENR_TIM7EN</span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM12          RCC_APB1LENR_TIM12EN</span></div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM13          RCC_APB1LENR_TIM13EN</span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_TIM14          RCC_APB1LENR_TIM14EN</span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_LPTIM1         RCC_APB1LENR_LPTIM1EN</span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span><span class="preprocessor">#if defined(DUAL_CORE)</span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_WWDG2          RCC_APB1LENR_WWDG2EN</span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span><span class="preprocessor">#endif </span><span class="comment">/*DUAL_CORE*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1LENR_SPI2EN</span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_SPI3           RCC_APB1LENR_SPI3EN</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_SPDIFRX        RCC_APB1LENR_SPDIFRXEN</span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_USART2         RCC_APB1LENR_USART2EN</span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_USART3         RCC_APB1LENR_USART3EN</span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_UART4          RCC_APB1LENR_UART4EN</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_UART5          RCC_APB1LENR_UART5EN</span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_I2C1           RCC_APB1LENR_I2C1EN</span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_I2C2           RCC_APB1LENR_I2C2EN</span></div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_I2C3           RCC_APB1LENR_I2C3EN</span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span><span class="preprocessor">#if defined(I2C5)</span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_I2C5           RCC_APB1LENR_I2C5EN</span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span><span class="preprocessor">#endif </span><span class="comment">/* I2C5 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span><span class="preprocessor">#if defined(RCC_APB1LENR_CECEN)</span></div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_CEC            RCC_APB1LENR_CECEN</span></div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_HDMICEC        RCC_APB1LENR_HDMICECEN</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_CEC            LL_APB1_GRP1_PERIPH_HDMICEC   </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_APB1LENR_CECEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_DAC12          RCC_APB1LENR_DAC12EN</span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_UART7          RCC_APB1LENR_UART7EN</span></div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span><span class="preprocessor">#define LL_APB1_GRP1_PERIPH_UART8          RCC_APB1LENR_UART8EN</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span> </div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_CRS            RCC_APB1HENR_CRSEN</span></div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_SWPMI1         RCC_APB1HENR_SWPMIEN</span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_OPAMP          RCC_APB1HENR_OPAMPEN</span></div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_MDIOS          RCC_APB1HENR_MDIOSEN</span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_FDCAN          RCC_APB1HENR_FDCANEN</span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span><span class="preprocessor">#if defined(TIM23)</span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_TIM23          RCC_APB1HENR_TIM23EN</span></div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span><span class="preprocessor">#endif </span><span class="comment">/* TIM23 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span><span class="preprocessor">#if defined(TIM24)</span></div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span><span class="preprocessor">#define LL_APB1_GRP2_PERIPH_TIM24          RCC_APB1HENR_TIM24EN</span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span><span class="preprocessor">#endif </span><span class="comment">/* TIM24 */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span> </div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span></div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_TIM1           RCC_APB2ENR_TIM1EN</span></div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_TIM8           RCC_APB2ENR_TIM8EN</span></div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_USART1         RCC_APB2ENR_USART1EN</span></div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_USART6         RCC_APB2ENR_USART6EN</span></div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span><span class="preprocessor">#if defined(UART9)</span></div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_UART9          RCC_APB2ENR_UART9EN</span></div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno">  325</span><span class="preprocessor">#endif </span><span class="comment">/* UART9 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span><span class="preprocessor">#if defined(USART10)</span></div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_USART10        RCC_APB2ENR_USART10EN</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span><span class="preprocessor">#endif </span><span class="comment">/* USART10 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SPI1           RCC_APB2ENR_SPI1EN</span></div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SPI4           RCC_APB2ENR_SPI4EN</span></div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_TIM15          RCC_APB2ENR_TIM15EN</span></div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_TIM16          RCC_APB2ENR_TIM16EN</span></div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_TIM17          RCC_APB2ENR_TIM17EN</span></div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SPI5           RCC_APB2ENR_SPI5EN</span></div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SAI1           RCC_APB2ENR_SAI1EN</span></div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span><span class="preprocessor">#if defined(SAI2)</span></div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SAI2           RCC_APB2ENR_SAI2EN</span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span><span class="preprocessor">#endif </span><span class="comment">/* SAI2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span><span class="preprocessor">#if defined(SAI3)</span></div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_SAI3           RCC_APB2ENR_SAI3EN</span></div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span><span class="preprocessor">#endif </span><span class="comment">/* SAI3 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_DFSDM1         RCC_APB2ENR_DFSDM1EN</span></div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span><span class="preprocessor">#if defined(HRTIM1)</span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span><span class="preprocessor">#define LL_APB2_GRP1_PERIPH_HRTIM          RCC_APB2ENR_HRTIMEN</span></div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span><span class="preprocessor">#endif </span><span class="comment">/* HRTIM1 */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno">  349</span> </div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno">  350</span></div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_SYSCFG         RCC_APB4ENR_SYSCFGEN</span></div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno">  355</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_LPUART1        RCC_APB4ENR_LPUART1EN</span></div>
<div class="line"><a id="l00356" name="l00356"></a><span class="lineno">  356</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_SPI6           RCC_APB4ENR_SPI6EN</span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_I2C4           RCC_APB4ENR_I2C4EN</span></div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno">  358</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_LPTIM2         RCC_APB4ENR_LPTIM2EN</span></div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno">  359</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_LPTIM3         RCC_APB4ENR_LPTIM3EN</span></div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span><span class="preprocessor">#if defined(LPTIM4)</span></div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_LPTIM4         RCC_APB4ENR_LPTIM4EN</span></div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno">  362</span><span class="preprocessor">#endif </span><span class="comment">/* LPTIM4 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span><span class="preprocessor">#if defined(LPTIM5)</span></div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno">  364</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_LPTIM5         RCC_APB4ENR_LPTIM5EN</span></div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno">  365</span><span class="preprocessor">#endif </span><span class="comment">/* LPTIM5 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00366" name="l00366"></a><span class="lineno">  366</span><span class="preprocessor">#if defined(DAC2)</span></div>
<div class="line"><a id="l00367" name="l00367"></a><span class="lineno">  367</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_DAC2           RCC_APB4ENR_DAC2EN</span></div>
<div class="line"><a id="l00368" name="l00368"></a><span class="lineno">  368</span><span class="preprocessor">#endif </span><span class="comment">/* DAC2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00369" name="l00369"></a><span class="lineno">  369</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_COMP12         RCC_APB4ENR_COMP12EN</span></div>
<div class="line"><a id="l00370" name="l00370"></a><span class="lineno">  370</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_VREF           RCC_APB4ENR_VREFEN</span></div>
<div class="line"><a id="l00371" name="l00371"></a><span class="lineno">  371</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_RTCAPB         RCC_APB4ENR_RTCAPBEN</span></div>
<div class="line"><a id="l00372" name="l00372"></a><span class="lineno">  372</span><span class="preprocessor">#if defined(SAI4)</span></div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_SAI4           RCC_APB4ENR_SAI4EN</span></div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno">  374</span><span class="preprocessor">#endif </span><span class="comment">/* SAI4 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno">  375</span><span class="preprocessor">#if defined(DTS)</span></div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_DTS            RCC_APB4ENR_DTSEN</span></div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span><span class="preprocessor">#endif </span><span class="comment">/*DTS*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno">  378</span><span class="preprocessor">#if defined(DFSDM2_BASE)</span></div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span><span class="preprocessor">#define LL_APB4_GRP1_PERIPH_DFSDM2         RCC_APB4ENR_DFSDM2EN</span></div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno">  380</span><span class="preprocessor">#endif </span><span class="comment">/* DFSDM2_BASE */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno">  388</span><span class="preprocessor">#if defined(RCC_D3AMR_BDMAAMEN)</span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span><span class="preprocessor">#define LL_CLKAM_PERIPH_BDMA          RCC_D3AMR_BDMAAMEN</span></div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno">  390</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span><span class="preprocessor">#define LL_CLKAM_PERIPH_BDMA2         RCC_SRDAMR_BDMA2AMEN</span></div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span><span class="preprocessor">#define LL_CLKAM_PERIPH_BDMA   LL_CLKAM_PERIPH_BDMA2 </span><span class="comment">/* for backward compatibility*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_BDMAAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span><span class="preprocessor">#if defined(RCC_SRDAMR_GPIOAMEN)</span></div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span><span class="preprocessor">#define LL_CLKAM_PERIPH_GPIO          RCC_SRDAMR_GPIOAMEN</span></div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno">  396</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_SRDAMR_GPIOAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span><span class="preprocessor">#if defined(RCC_D3AMR_LPUART1AMEN)</span></div>
<div class="line"><a id="l00398" name="l00398"></a><span class="lineno">  398</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPUART1       RCC_D3AMR_LPUART1AMEN</span></div>
<div class="line"><a id="l00399" name="l00399"></a><span class="lineno">  399</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00400" name="l00400"></a><span class="lineno">  400</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPUART1       RCC_SRDAMR_LPUART1AMEN</span></div>
<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_LPUART1AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span><span class="preprocessor">#if defined(RCC_D3AMR_SPI6AMEN)</span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SPI6          RCC_D3AMR_SPI6AMEN</span></div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SPI6          RCC_SRDAMR_SPI6AMEN</span></div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_SPI6AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span><span class="preprocessor">#if defined(RCC_D3AMR_I2C4AMEN)</span></div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span><span class="preprocessor">#define LL_CLKAM_PERIPH_I2C4          RCC_D3AMR_I2C4AMEN</span></div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno">  409</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span><span class="preprocessor">#define LL_CLKAM_PERIPH_I2C4          RCC_SRDAMR_I2C4AMEN</span></div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno">  411</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_I2C4AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno">  412</span><span class="preprocessor">#if defined(RCC_D3AMR_LPTIM2AMEN)</span></div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM2        RCC_D3AMR_LPTIM2AMEN</span></div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM2        RCC_SRDAMR_LPTIM2AMEN</span></div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_LPTIM2AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span><span class="preprocessor">#if defined(RCC_D3AMR_LPTIM3AMEN)</span></div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM3        RCC_D3AMR_LPTIM3AMEN</span></div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM3        RCC_SRDAMR_LPTIM3AMEN</span></div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_LPTIM3AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span><span class="preprocessor">#if defined(RCC_D3AMR_LPTIM4AMEN)</span></div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM4        RCC_D3AMR_LPTIM4AMEN</span></div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_LPTIM4AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno">  425</span><span class="preprocessor">#if defined(RCC_D3AMR_LPTIM5AMEN)</span></div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span><span class="preprocessor">#define LL_CLKAM_PERIPH_LPTIM5        RCC_D3AMR_LPTIM5AMEN</span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_LPTIM5AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span><span class="preprocessor">#if defined(DAC2)</span></div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span><span class="preprocessor">#define LL_CLKAM_PERIPH_DAC2          RCC_SRDAMR_DAC2AMEN</span></div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span><span class="preprocessor">#endif </span><span class="comment">/* DAC2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span><span class="preprocessor">#if defined(RCC_D3AMR_COMP12AMEN)</span></div>
<div class="line"><a id="l00432" name="l00432"></a><span class="lineno">  432</span><span class="preprocessor">#define LL_CLKAM_PERIPH_COMP12        RCC_D3AMR_COMP12AMEN</span></div>
<div class="line"><a id="l00433" name="l00433"></a><span class="lineno">  433</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span><span class="preprocessor">#define LL_CLKAM_PERIPH_COMP12        RCC_SRDAMR_COMP12AMEN</span></div>
<div class="line"><a id="l00435" name="l00435"></a><span class="lineno">  435</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_COMP12AMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span><span class="preprocessor">#if defined(RCC_D3AMR_VREFAMEN)</span></div>
<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span><span class="preprocessor">#define LL_CLKAM_PERIPH_VREF          RCC_D3AMR_VREFAMEN</span></div>
<div class="line"><a id="l00438" name="l00438"></a><span class="lineno">  438</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00439" name="l00439"></a><span class="lineno">  439</span><span class="preprocessor">#define LL_CLKAM_PERIPH_VREF          RCC_SRDAMR_VREFAMEN</span></div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_VREFAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span><span class="preprocessor">#if defined(RCC_D3AMR_RTCAMEN)</span></div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span><span class="preprocessor">#define LL_CLKAM_PERIPH_RTC           RCC_D3AMR_RTCAMEN</span></div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span><span class="preprocessor">#define LL_CLKAM_PERIPH_RTC           RCC_SRDAMR_RTCAMEN</span></div>
<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_RTCAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00446" name="l00446"></a><span class="lineno">  446</span><span class="preprocessor">#if defined(RCC_D3AMR_CRCAMEN)</span></div>
<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span><span class="preprocessor">#define LL_CLKAM_PERIPH_CRC           RCC_D3AMR_CRCAMEN</span></div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_CRCAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span><span class="preprocessor">#if defined(SAI4)</span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SAI4          RCC_D3AMR_SAI4AMEN</span></div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span><span class="preprocessor">#endif </span><span class="comment">/* SAI4 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span><span class="preprocessor">#if defined(ADC3)</span></div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span><span class="preprocessor">#define LL_CLKAM_PERIPH_ADC3          RCC_D3AMR_ADC3AMEN</span></div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span><span class="preprocessor">#endif </span><span class="comment">/* ADC3 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span><span class="preprocessor">#if defined(RCC_SRDAMR_DTSAMEN)</span></div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span><span class="preprocessor">#define LL_CLKAM_PERIPH_DTS           RCC_SRDAMR_DTSAMEN</span></div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_SRDAMR_DTSAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span><span class="preprocessor">#if defined(RCC_D3AMR_DTSAMEN)</span></div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span><span class="preprocessor">#define LL_CLKAM_PERIPH_DTS           RCC_D3AMR_DTSAMEN</span></div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_DTSAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span><span class="preprocessor">#if defined(DFSDM2_BASE)</span></div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span><span class="preprocessor">#define LL_CLKAM_PERIPH_DFSDM2        RCC_SRDAMR_DFSDM2AMEN</span></div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span><span class="preprocessor">#endif </span><span class="comment">/* DFSDM2_BASE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span><span class="preprocessor">#if defined(RCC_D3AMR_BKPRAMAMEN)</span></div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span><span class="preprocessor">#define LL_CLKAM_PERIPH_BKPRAM        RCC_D3AMR_BKPRAMAMEN</span></div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno">  466</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno">  467</span><span class="preprocessor">#define LL_CLKAM_PERIPH_BKPRAM        RCC_SRDAMR_BKPRAMAMEN</span></div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_BKPRAMAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno">  469</span><span class="preprocessor">#if defined(RCC_D3AMR_SRAM4AMEN)</span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno">  470</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SRAM4         RCC_D3AMR_SRAM4AMEN</span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SRDSRAM       RCC_SRDAMR_SRDSRAMAMEN</span></div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span><span class="preprocessor">#define LL_CLKAM_PERIPH_SRAM4         LL_CLKAM_PERIPH_SRDSRAM</span></div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_SRAM4AMEN */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00478" name="l00478"></a><span class="lineno">  478</span> </div>
<div class="line"><a id="l00479" name="l00479"></a><span class="lineno">  479</span><span class="preprocessor">#if defined(RCC_CKGAENR_AXICKG)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno">  483</span><span class="preprocessor">#define LL_CKGA_PERIPH_AXI            RCC_CKGAENR_AXICKG</span></div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span><span class="preprocessor">#define LL_CKGA_PERIPH_AHB            RCC_CKGAENR_AHBCKG</span></div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno">  485</span><span class="preprocessor">#define LL_CKGA_PERIPH_CPU            RCC_CKGAENR_CPUCKG</span></div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span><span class="preprocessor">#define LL_CKGA_PERIPH_SDMMC          RCC_CKGAENR_SDMMCCKG</span></div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span><span class="preprocessor">#define LL_CKGA_PERIPH_MDMA           RCC_CKGAENR_MDMACKG</span></div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span><span class="preprocessor">#define LL_CKGA_PERIPH_DMA2D          RCC_CKGAENR_DMA2DCKG</span></div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span><span class="preprocessor">#define LL_CKGA_PERIPH_LTDC           RCC_CKGAENR_LTDCCKG</span></div>
<div class="line"><a id="l00490" name="l00490"></a><span class="lineno">  490</span><span class="preprocessor">#define LL_CKGA_PERIPH_GFXMMUM        RCC_CKGAENR_GFXMMUMCKG</span></div>
<div class="line"><a id="l00491" name="l00491"></a><span class="lineno">  491</span><span class="preprocessor">#define LL_CKGA_PERIPH_AHB12          RCC_CKGAENR_AHB12CKG</span></div>
<div class="line"><a id="l00492" name="l00492"></a><span class="lineno">  492</span><span class="preprocessor">#define LL_CKGA_PERIPH_AHB34          RCC_CKGAENR_AHB34CKG</span></div>
<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span><span class="preprocessor">#define LL_CKGA_PERIPH_FLIFT          RCC_CKGAENR_FLIFTCKG</span></div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span><span class="preprocessor">#define LL_CKGA_PERIPH_OCTOSPI2       RCC_CKGAENR_OCTOSPI2CKG</span></div>
<div class="line"><a id="l00495" name="l00495"></a><span class="lineno">  495</span><span class="preprocessor">#define LL_CKGA_PERIPH_FMC            RCC_CKGAENR_FMCCKG</span></div>
<div class="line"><a id="l00496" name="l00496"></a><span class="lineno">  496</span><span class="preprocessor">#define LL_CKGA_PERIPH_OCTOSPI1       RCC_CKGAENR_OCTOSPI1CKG</span></div>
<div class="line"><a id="l00497" name="l00497"></a><span class="lineno">  497</span><span class="preprocessor">#define LL_CKGA_PERIPH_AXIRAM1        RCC_CKGAENR_AXIRAM1CKG</span></div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span><span class="preprocessor">#define LL_CKGA_PERIPH_AXIRAM2        RCC_CKGAENR_AXIRAM2CKG</span></div>
<div class="line"><a id="l00499" name="l00499"></a><span class="lineno">  499</span><span class="preprocessor">#define LL_CKGA_PERIPH_AXIRAM3        RCC_CKGAENR_AXIRAM3CKG</span></div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span><span class="preprocessor">#define LL_CKGA_PERIPH_GFXMMUS        RCC_CKGAENR_GFXMMUSCKG</span></div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span><span class="preprocessor">#define LL_CKGA_PERIPH_ECCRAM         RCC_CKGAENR_ECCRAMCKG</span></div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span><span class="preprocessor">#define LL_CKGA_PERIPH_EXTI           RCC_CKGAENR_EXTICKG</span></div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span><span class="preprocessor">#define LL_CKGA_PERIPH_JTAG           RCC_CKGAENR_JTAGCKG</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00507" name="l00507"></a><span class="lineno">  507</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_CKGAENR_AXICKG */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00508" name="l00508"></a><span class="lineno">  508</span></div>
<div class="line"><a id="l00512" name="l00512"></a><span class="lineno">  512</span> </div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno">  513</span><span class="comment">/* Exported macro ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span> </div>
<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span><span class="comment">/* Exported functions --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00516" name="l00516"></a><span class="lineno">  516</span></div>
<div class="line"><a id="l00520" name="l00520"></a><span class="lineno">  520</span></div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno">  524</span></div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno">  566</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l00567" name="l00567"></a><span class="lineno">  567</span>{</div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l00569" name="l00569"></a><span class="lineno">  569</span>  SET_BIT(RCC-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l00570" name="l00570"></a><span class="lineno">  570</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l00571" name="l00571"></a><span class="lineno">  571</span>  tmpreg = READ_BIT(RCC-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l00572" name="l00572"></a><span class="lineno">  572</span>  (void)tmpreg;</div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span>}</div>
<div class="line"><a id="l00574" name="l00574"></a><span class="lineno">  574</span></div>
<div class="line"><a id="l00616" name="l00616"></a><span class="lineno">  616</span>__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l00617" name="l00617"></a><span class="lineno">  617</span>{</div>
<div class="line"><a id="l00618" name="l00618"></a><span class="lineno">  618</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;AHB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l00619" name="l00619"></a><span class="lineno">  619</span>}</div>
<div class="line"><a id="l00620" name="l00620"></a><span class="lineno">  620</span></div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno">  662</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno">  663</span>{</div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span>  CLEAR_BIT(RCC-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno">  665</span>}</div>
<div class="line"><a id="l00666" name="l00666"></a><span class="lineno">  666</span></div>
<div class="line"><a id="l00698" name="l00698"></a><span class="lineno">  698</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l00699" name="l00699"></a><span class="lineno">  699</span>{</div>
<div class="line"><a id="l00700" name="l00700"></a><span class="lineno">  700</span>  SET_BIT(RCC-&gt;AHB3RSTR, Periphs);</div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno">  701</span>}</div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span></div>
<div class="line"><a id="l00734" name="l00734"></a><span class="lineno">  734</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span>{</div>
<div class="line"><a id="l00736" name="l00736"></a><span class="lineno">  736</span>  CLEAR_BIT(RCC-&gt;AHB3RSTR, Periphs);</div>
<div class="line"><a id="l00737" name="l00737"></a><span class="lineno">  737</span>}</div>
<div class="line"><a id="l00738" name="l00738"></a><span class="lineno">  738</span></div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span>{</div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno">  781</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span>  SET_BIT(RCC-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l00784" name="l00784"></a><span class="lineno">  784</span>  tmpreg = READ_BIT(RCC-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l00785" name="l00785"></a><span class="lineno">  785</span>  (void)tmpreg;</div>
<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span>}</div>
<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span></div>
<div class="line"><a id="l00828" name="l00828"></a><span class="lineno">  828</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l00829" name="l00829"></a><span class="lineno">  829</span>{</div>
<div class="line"><a id="l00830" name="l00830"></a><span class="lineno">  830</span>  CLEAR_BIT(RCC-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l00831" name="l00831"></a><span class="lineno">  831</span>}</div>
<div class="line"><a id="l00832" name="l00832"></a><span class="lineno">  832</span></div>
<div class="line"><a id="l00836" name="l00836"></a><span class="lineno">  836</span></div>
<div class="line"><a id="l00840" name="l00840"></a><span class="lineno">  840</span></div>
<div class="line"><a id="l00872" name="l00872"></a><span class="lineno">  872</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l00873" name="l00873"></a><span class="lineno">  873</span>{</div>
<div class="line"><a id="l00874" name="l00874"></a><span class="lineno">  874</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span>  SET_BIT(RCC-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l00876" name="l00876"></a><span class="lineno">  876</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l00877" name="l00877"></a><span class="lineno">  877</span>  tmpreg = READ_BIT(RCC-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l00878" name="l00878"></a><span class="lineno">  878</span>  (void)tmpreg;</div>
<div class="line"><a id="l00879" name="l00879"></a><span class="lineno">  879</span>}</div>
<div class="line"><a id="l00880" name="l00880"></a><span class="lineno">  880</span></div>
<div class="line"><a id="l00912" name="l00912"></a><span class="lineno">  912</span>__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l00913" name="l00913"></a><span class="lineno">  913</span>{</div>
<div class="line"><a id="l00914" name="l00914"></a><span class="lineno">  914</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;AHB1ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l00915" name="l00915"></a><span class="lineno">  915</span>}</div>
<div class="line"><a id="l00916" name="l00916"></a><span class="lineno">  916</span></div>
<div class="line"><a id="l00948" name="l00948"></a><span class="lineno">  948</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l00949" name="l00949"></a><span class="lineno">  949</span>{</div>
<div class="line"><a id="l00950" name="l00950"></a><span class="lineno">  950</span>  CLEAR_BIT(RCC-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l00951" name="l00951"></a><span class="lineno">  951</span>}</div>
<div class="line"><a id="l00952" name="l00952"></a><span class="lineno">  952</span></div>
<div class="line"><a id="l00976" name="l00976"></a><span class="lineno">  976</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l00977" name="l00977"></a><span class="lineno">  977</span>{</div>
<div class="line"><a id="l00978" name="l00978"></a><span class="lineno">  978</span>  SET_BIT(RCC-&gt;AHB1RSTR, Periphs);</div>
<div class="line"><a id="l00979" name="l00979"></a><span class="lineno">  979</span>}</div>
<div class="line"><a id="l00980" name="l00980"></a><span class="lineno">  980</span></div>
<div class="line"><a id="l01004" name="l01004"></a><span class="lineno"> 1004</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l01005" name="l01005"></a><span class="lineno"> 1005</span>{</div>
<div class="line"><a id="l01006" name="l01006"></a><span class="lineno"> 1006</span>  CLEAR_BIT(RCC-&gt;AHB1RSTR, Periphs);</div>
<div class="line"><a id="l01007" name="l01007"></a><span class="lineno"> 1007</span>}</div>
<div class="line"><a id="l01008" name="l01008"></a><span class="lineno"> 1008</span></div>
<div class="line"><a id="l01040" name="l01040"></a><span class="lineno"> 1040</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01041" name="l01041"></a><span class="lineno"> 1041</span>{</div>
<div class="line"><a id="l01042" name="l01042"></a><span class="lineno"> 1042</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01043" name="l01043"></a><span class="lineno"> 1043</span>  SET_BIT(RCC-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l01044" name="l01044"></a><span class="lineno"> 1044</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01045" name="l01045"></a><span class="lineno"> 1045</span>  tmpreg = READ_BIT(RCC-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l01046" name="l01046"></a><span class="lineno"> 1046</span>  (void)tmpreg;</div>
<div class="line"><a id="l01047" name="l01047"></a><span class="lineno"> 1047</span>}</div>
<div class="line"><a id="l01048" name="l01048"></a><span class="lineno"> 1048</span></div>
<div class="line"><a id="l01080" name="l01080"></a><span class="lineno"> 1080</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01081" name="l01081"></a><span class="lineno"> 1081</span>{</div>
<div class="line"><a id="l01082" name="l01082"></a><span class="lineno"> 1082</span>  CLEAR_BIT(RCC-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l01083" name="l01083"></a><span class="lineno"> 1083</span>}</div>
<div class="line"><a id="l01084" name="l01084"></a><span class="lineno"> 1084</span></div>
<div class="line"><a id="l01088" name="l01088"></a><span class="lineno"> 1088</span></div>
<div class="line"><a id="l01092" name="l01092"></a><span class="lineno"> 1092</span></div>
<div class="line"><a id="l01124" name="l01124"></a><span class="lineno"> 1124</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01125" name="l01125"></a><span class="lineno"> 1125</span>{</div>
<div class="line"><a id="l01126" name="l01126"></a><span class="lineno"> 1126</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01127" name="l01127"></a><span class="lineno"> 1127</span>  SET_BIT(RCC-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l01128" name="l01128"></a><span class="lineno"> 1128</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01129" name="l01129"></a><span class="lineno"> 1129</span>  tmpreg = READ_BIT(RCC-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l01130" name="l01130"></a><span class="lineno"> 1130</span>  (void)tmpreg;</div>
<div class="line"><a id="l01131" name="l01131"></a><span class="lineno"> 1131</span>}</div>
<div class="line"><a id="l01132" name="l01132"></a><span class="lineno"> 1132</span></div>
<div class="line"><a id="l01164" name="l01164"></a><span class="lineno"> 1164</span>__STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l01165" name="l01165"></a><span class="lineno"> 1165</span>{</div>
<div class="line"><a id="l01166" name="l01166"></a><span class="lineno"> 1166</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;AHB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l01167" name="l01167"></a><span class="lineno"> 1167</span>}</div>
<div class="line"><a id="l01168" name="l01168"></a><span class="lineno"> 1168</span></div>
<div class="line"><a id="l01200" name="l01200"></a><span class="lineno"> 1200</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01201" name="l01201"></a><span class="lineno"> 1201</span>{</div>
<div class="line"><a id="l01202" name="l01202"></a><span class="lineno"> 1202</span>  CLEAR_BIT(RCC-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l01203" name="l01203"></a><span class="lineno"> 1203</span>}</div>
<div class="line"><a id="l01204" name="l01204"></a><span class="lineno"> 1204</span></div>
<div class="line"><a id="l01230" name="l01230"></a><span class="lineno"> 1230</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l01231" name="l01231"></a><span class="lineno"> 1231</span>{</div>
<div class="line"><a id="l01232" name="l01232"></a><span class="lineno"> 1232</span>  SET_BIT(RCC-&gt;AHB2RSTR, Periphs);</div>
<div class="line"><a id="l01233" name="l01233"></a><span class="lineno"> 1233</span>}</div>
<div class="line"><a id="l01234" name="l01234"></a><span class="lineno"> 1234</span></div>
<div class="line"><a id="l01260" name="l01260"></a><span class="lineno"> 1260</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l01261" name="l01261"></a><span class="lineno"> 1261</span>{</div>
<div class="line"><a id="l01262" name="l01262"></a><span class="lineno"> 1262</span>  CLEAR_BIT(RCC-&gt;AHB2RSTR, Periphs);</div>
<div class="line"><a id="l01263" name="l01263"></a><span class="lineno"> 1263</span>}</div>
<div class="line"><a id="l01264" name="l01264"></a><span class="lineno"> 1264</span></div>
<div class="line"><a id="l01294" name="l01294"></a><span class="lineno"> 1294</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01295" name="l01295"></a><span class="lineno"> 1295</span>{</div>
<div class="line"><a id="l01296" name="l01296"></a><span class="lineno"> 1296</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01297" name="l01297"></a><span class="lineno"> 1297</span>  SET_BIT(RCC-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l01298" name="l01298"></a><span class="lineno"> 1298</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01299" name="l01299"></a><span class="lineno"> 1299</span>  tmpreg = READ_BIT(RCC-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l01300" name="l01300"></a><span class="lineno"> 1300</span>  (void)tmpreg;</div>
<div class="line"><a id="l01301" name="l01301"></a><span class="lineno"> 1301</span>}</div>
<div class="line"><a id="l01302" name="l01302"></a><span class="lineno"> 1302</span></div>
<div class="line"><a id="l01330" name="l01330"></a><span class="lineno"> 1330</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01331" name="l01331"></a><span class="lineno"> 1331</span>{</div>
<div class="line"><a id="l01332" name="l01332"></a><span class="lineno"> 1332</span>  CLEAR_BIT(RCC-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l01333" name="l01333"></a><span class="lineno"> 1333</span>}</div>
<div class="line"><a id="l01334" name="l01334"></a><span class="lineno"> 1334</span></div>
<div class="line"><a id="l01338" name="l01338"></a><span class="lineno"> 1338</span></div>
<div class="line"><a id="l01342" name="l01342"></a><span class="lineno"> 1342</span></div>
<div class="line"><a id="l01384" name="l01384"></a><span class="lineno"> 1384</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01385" name="l01385"></a><span class="lineno"> 1385</span>{</div>
<div class="line"><a id="l01386" name="l01386"></a><span class="lineno"> 1386</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01387" name="l01387"></a><span class="lineno"> 1387</span>  SET_BIT(RCC-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l01388" name="l01388"></a><span class="lineno"> 1388</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01389" name="l01389"></a><span class="lineno"> 1389</span>  tmpreg = READ_BIT(RCC-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l01390" name="l01390"></a><span class="lineno"> 1390</span>  (void)tmpreg;</div>
<div class="line"><a id="l01391" name="l01391"></a><span class="lineno"> 1391</span>}</div>
<div class="line"><a id="l01392" name="l01392"></a><span class="lineno"> 1392</span></div>
<div class="line"><a id="l01434" name="l01434"></a><span class="lineno"> 1434</span>__STATIC_INLINE uint32_t LL_AHB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l01435" name="l01435"></a><span class="lineno"> 1435</span>{</div>
<div class="line"><a id="l01436" name="l01436"></a><span class="lineno"> 1436</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;AHB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l01437" name="l01437"></a><span class="lineno"> 1437</span>}</div>
<div class="line"><a id="l01438" name="l01438"></a><span class="lineno"> 1438</span></div>
<div class="line"><a id="l01480" name="l01480"></a><span class="lineno"> 1480</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01481" name="l01481"></a><span class="lineno"> 1481</span>{</div>
<div class="line"><a id="l01482" name="l01482"></a><span class="lineno"> 1482</span>  CLEAR_BIT(RCC-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l01483" name="l01483"></a><span class="lineno"> 1483</span>}</div>
<div class="line"><a id="l01484" name="l01484"></a><span class="lineno"> 1484</span></div>
<div class="line"><a id="l01522" name="l01522"></a><span class="lineno"> 1522</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l01523" name="l01523"></a><span class="lineno"> 1523</span>{</div>
<div class="line"><a id="l01524" name="l01524"></a><span class="lineno"> 1524</span>  SET_BIT(RCC-&gt;AHB4RSTR, Periphs);</div>
<div class="line"><a id="l01525" name="l01525"></a><span class="lineno"> 1525</span>}</div>
<div class="line"><a id="l01526" name="l01526"></a><span class="lineno"> 1526</span></div>
<div class="line"><a id="l01564" name="l01564"></a><span class="lineno"> 1564</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l01565" name="l01565"></a><span class="lineno"> 1565</span>{</div>
<div class="line"><a id="l01566" name="l01566"></a><span class="lineno"> 1566</span>  CLEAR_BIT(RCC-&gt;AHB4RSTR, Periphs);</div>
<div class="line"><a id="l01567" name="l01567"></a><span class="lineno"> 1567</span>}</div>
<div class="line"><a id="l01568" name="l01568"></a><span class="lineno"> 1568</span></div>
<div class="line"><a id="l01606" name="l01606"></a><span class="lineno"> 1606</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01607" name="l01607"></a><span class="lineno"> 1607</span>{</div>
<div class="line"><a id="l01608" name="l01608"></a><span class="lineno"> 1608</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01609" name="l01609"></a><span class="lineno"> 1609</span>  SET_BIT(RCC-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l01610" name="l01610"></a><span class="lineno"> 1610</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01611" name="l01611"></a><span class="lineno"> 1611</span>  tmpreg = READ_BIT(RCC-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l01612" name="l01612"></a><span class="lineno"> 1612</span>  (void)tmpreg;</div>
<div class="line"><a id="l01613" name="l01613"></a><span class="lineno"> 1613</span>}</div>
<div class="line"><a id="l01614" name="l01614"></a><span class="lineno"> 1614</span></div>
<div class="line"><a id="l01652" name="l01652"></a><span class="lineno"> 1652</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_AHB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01653" name="l01653"></a><span class="lineno"> 1653</span>{</div>
<div class="line"><a id="l01654" name="l01654"></a><span class="lineno"> 1654</span>  CLEAR_BIT(RCC-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l01655" name="l01655"></a><span class="lineno"> 1655</span>}</div>
<div class="line"><a id="l01656" name="l01656"></a><span class="lineno"> 1656</span></div>
<div class="line"><a id="l01660" name="l01660"></a><span class="lineno"> 1660</span></div>
<div class="line"><a id="l01664" name="l01664"></a><span class="lineno"> 1664</span></div>
<div class="line"><a id="l01678" name="l01678"></a><span class="lineno"> 1678</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01679" name="l01679"></a><span class="lineno"> 1679</span>{</div>
<div class="line"><a id="l01680" name="l01680"></a><span class="lineno"> 1680</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01681" name="l01681"></a><span class="lineno"> 1681</span>  SET_BIT(RCC-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l01682" name="l01682"></a><span class="lineno"> 1682</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01683" name="l01683"></a><span class="lineno"> 1683</span>  tmpreg = READ_BIT(RCC-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l01684" name="l01684"></a><span class="lineno"> 1684</span>  (void)tmpreg;</div>
<div class="line"><a id="l01685" name="l01685"></a><span class="lineno"> 1685</span>}</div>
<div class="line"><a id="l01686" name="l01686"></a><span class="lineno"> 1686</span></div>
<div class="line"><a id="l01700" name="l01700"></a><span class="lineno"> 1700</span>__STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l01701" name="l01701"></a><span class="lineno"> 1701</span>{</div>
<div class="line"><a id="l01702" name="l01702"></a><span class="lineno"> 1702</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;APB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l01703" name="l01703"></a><span class="lineno"> 1703</span>}</div>
<div class="line"><a id="l01704" name="l01704"></a><span class="lineno"> 1704</span></div>
<div class="line"><a id="l01718" name="l01718"></a><span class="lineno"> 1718</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01719" name="l01719"></a><span class="lineno"> 1719</span>{</div>
<div class="line"><a id="l01720" name="l01720"></a><span class="lineno"> 1720</span>  CLEAR_BIT(RCC-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l01721" name="l01721"></a><span class="lineno"> 1721</span>}</div>
<div class="line"><a id="l01722" name="l01722"></a><span class="lineno"> 1722</span></div>
<div class="line"><a id="l01734" name="l01734"></a><span class="lineno"> 1734</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l01735" name="l01735"></a><span class="lineno"> 1735</span>{</div>
<div class="line"><a id="l01736" name="l01736"></a><span class="lineno"> 1736</span>  SET_BIT(RCC-&gt;APB3RSTR, Periphs);</div>
<div class="line"><a id="l01737" name="l01737"></a><span class="lineno"> 1737</span>}</div>
<div class="line"><a id="l01738" name="l01738"></a><span class="lineno"> 1738</span></div>
<div class="line"><a id="l01750" name="l01750"></a><span class="lineno"> 1750</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l01751" name="l01751"></a><span class="lineno"> 1751</span>{</div>
<div class="line"><a id="l01752" name="l01752"></a><span class="lineno"> 1752</span>  CLEAR_BIT(RCC-&gt;APB3RSTR, Periphs);</div>
<div class="line"><a id="l01753" name="l01753"></a><span class="lineno"> 1753</span>}</div>
<div class="line"><a id="l01754" name="l01754"></a><span class="lineno"> 1754</span></div>
<div class="line"><a id="l01768" name="l01768"></a><span class="lineno"> 1768</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01769" name="l01769"></a><span class="lineno"> 1769</span>{</div>
<div class="line"><a id="l01770" name="l01770"></a><span class="lineno"> 1770</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01771" name="l01771"></a><span class="lineno"> 1771</span>  SET_BIT(RCC-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l01772" name="l01772"></a><span class="lineno"> 1772</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01773" name="l01773"></a><span class="lineno"> 1773</span>  tmpreg = READ_BIT(RCC-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l01774" name="l01774"></a><span class="lineno"> 1774</span>  (void)tmpreg;</div>
<div class="line"><a id="l01775" name="l01775"></a><span class="lineno"> 1775</span>}</div>
<div class="line"><a id="l01776" name="l01776"></a><span class="lineno"> 1776</span></div>
<div class="line"><a id="l01790" name="l01790"></a><span class="lineno"> 1790</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l01791" name="l01791"></a><span class="lineno"> 1791</span>{</div>
<div class="line"><a id="l01792" name="l01792"></a><span class="lineno"> 1792</span>  CLEAR_BIT(RCC-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l01793" name="l01793"></a><span class="lineno"> 1793</span>}</div>
<div class="line"><a id="l01794" name="l01794"></a><span class="lineno"> 1794</span></div>
<div class="line"><a id="l01798" name="l01798"></a><span class="lineno"> 1798</span></div>
<div class="line"><a id="l01802" name="l01802"></a><span class="lineno"> 1802</span></div>
<div class="line"><a id="l01862" name="l01862"></a><span class="lineno"> 1862</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01863" name="l01863"></a><span class="lineno"> 1863</span>{</div>
<div class="line"><a id="l01864" name="l01864"></a><span class="lineno"> 1864</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l01865" name="l01865"></a><span class="lineno"> 1865</span>  SET_BIT(RCC-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l01866" name="l01866"></a><span class="lineno"> 1866</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l01867" name="l01867"></a><span class="lineno"> 1867</span>  tmpreg = READ_BIT(RCC-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l01868" name="l01868"></a><span class="lineno"> 1868</span>  (void)tmpreg;</div>
<div class="line"><a id="l01869" name="l01869"></a><span class="lineno"> 1869</span>}</div>
<div class="line"><a id="l01870" name="l01870"></a><span class="lineno"> 1870</span></div>
<div class="line"><a id="l01930" name="l01930"></a><span class="lineno"> 1930</span>__STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l01931" name="l01931"></a><span class="lineno"> 1931</span>{</div>
<div class="line"><a id="l01932" name="l01932"></a><span class="lineno"> 1932</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;APB1LENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l01933" name="l01933"></a><span class="lineno"> 1933</span>}</div>
<div class="line"><a id="l01934" name="l01934"></a><span class="lineno"> 1934</span></div>
<div class="line"><a id="l01994" name="l01994"></a><span class="lineno"> 1994</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l01995" name="l01995"></a><span class="lineno"> 1995</span>{</div>
<div class="line"><a id="l01996" name="l01996"></a><span class="lineno"> 1996</span>  CLEAR_BIT(RCC-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l01997" name="l01997"></a><span class="lineno"> 1997</span>}</div>
<div class="line"><a id="l01998" name="l01998"></a><span class="lineno"> 1998</span></div>
<div class="line"><a id="l02056" name="l02056"></a><span class="lineno"> 2056</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l02057" name="l02057"></a><span class="lineno"> 2057</span>{</div>
<div class="line"><a id="l02058" name="l02058"></a><span class="lineno"> 2058</span>  SET_BIT(RCC-&gt;APB1LRSTR, Periphs);</div>
<div class="line"><a id="l02059" name="l02059"></a><span class="lineno"> 2059</span>}</div>
<div class="line"><a id="l02060" name="l02060"></a><span class="lineno"> 2060</span></div>
<div class="line"><a id="l02118" name="l02118"></a><span class="lineno"> 2118</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l02119" name="l02119"></a><span class="lineno"> 2119</span>{</div>
<div class="line"><a id="l02120" name="l02120"></a><span class="lineno"> 2120</span>  CLEAR_BIT(RCC-&gt;APB1LRSTR, Periphs);</div>
<div class="line"><a id="l02121" name="l02121"></a><span class="lineno"> 2121</span>}</div>
<div class="line"><a id="l02122" name="l02122"></a><span class="lineno"> 2122</span></div>
<div class="line"><a id="l02182" name="l02182"></a><span class="lineno"> 2182</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02183" name="l02183"></a><span class="lineno"> 2183</span>{</div>
<div class="line"><a id="l02184" name="l02184"></a><span class="lineno"> 2184</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02185" name="l02185"></a><span class="lineno"> 2185</span>  SET_BIT(RCC-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l02186" name="l02186"></a><span class="lineno"> 2186</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02187" name="l02187"></a><span class="lineno"> 2187</span>  tmpreg = READ_BIT(RCC-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l02188" name="l02188"></a><span class="lineno"> 2188</span>  (void)tmpreg;</div>
<div class="line"><a id="l02189" name="l02189"></a><span class="lineno"> 2189</span>}</div>
<div class="line"><a id="l02190" name="l02190"></a><span class="lineno"> 2190</span></div>
<div class="line"><a id="l02250" name="l02250"></a><span class="lineno"> 2250</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02251" name="l02251"></a><span class="lineno"> 2251</span>{</div>
<div class="line"><a id="l02252" name="l02252"></a><span class="lineno"> 2252</span>  CLEAR_BIT(RCC-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l02253" name="l02253"></a><span class="lineno"> 2253</span>}</div>
<div class="line"><a id="l02254" name="l02254"></a><span class="lineno"> 2254</span></div>
<div class="line"><a id="l02274" name="l02274"></a><span class="lineno"> 2274</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02275" name="l02275"></a><span class="lineno"> 2275</span>{</div>
<div class="line"><a id="l02276" name="l02276"></a><span class="lineno"> 2276</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02277" name="l02277"></a><span class="lineno"> 2277</span>  SET_BIT(RCC-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l02278" name="l02278"></a><span class="lineno"> 2278</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02279" name="l02279"></a><span class="lineno"> 2279</span>  tmpreg = READ_BIT(RCC-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l02280" name="l02280"></a><span class="lineno"> 2280</span>  (void)tmpreg;</div>
<div class="line"><a id="l02281" name="l02281"></a><span class="lineno"> 2281</span>}</div>
<div class="line"><a id="l02282" name="l02282"></a><span class="lineno"> 2282</span></div>
<div class="line"><a id="l02302" name="l02302"></a><span class="lineno"> 2302</span>__STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l02303" name="l02303"></a><span class="lineno"> 2303</span>{</div>
<div class="line"><a id="l02304" name="l02304"></a><span class="lineno"> 2304</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;APB1HENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l02305" name="l02305"></a><span class="lineno"> 2305</span>}</div>
<div class="line"><a id="l02306" name="l02306"></a><span class="lineno"> 2306</span></div>
<div class="line"><a id="l02326" name="l02326"></a><span class="lineno"> 2326</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02327" name="l02327"></a><span class="lineno"> 2327</span>{</div>
<div class="line"><a id="l02328" name="l02328"></a><span class="lineno"> 2328</span>  CLEAR_BIT(RCC-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l02329" name="l02329"></a><span class="lineno"> 2329</span>}</div>
<div class="line"><a id="l02330" name="l02330"></a><span class="lineno"> 2330</span></div>
<div class="line"><a id="l02350" name="l02350"></a><span class="lineno"> 2350</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l02351" name="l02351"></a><span class="lineno"> 2351</span>{</div>
<div class="line"><a id="l02352" name="l02352"></a><span class="lineno"> 2352</span>  SET_BIT(RCC-&gt;APB1HRSTR, Periphs);</div>
<div class="line"><a id="l02353" name="l02353"></a><span class="lineno"> 2353</span>}</div>
<div class="line"><a id="l02354" name="l02354"></a><span class="lineno"> 2354</span></div>
<div class="line"><a id="l02374" name="l02374"></a><span class="lineno"> 2374</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l02375" name="l02375"></a><span class="lineno"> 2375</span>{</div>
<div class="line"><a id="l02376" name="l02376"></a><span class="lineno"> 2376</span>  CLEAR_BIT(RCC-&gt;APB1HRSTR, Periphs);</div>
<div class="line"><a id="l02377" name="l02377"></a><span class="lineno"> 2377</span>}</div>
<div class="line"><a id="l02378" name="l02378"></a><span class="lineno"> 2378</span></div>
<div class="line"><a id="l02398" name="l02398"></a><span class="lineno"> 2398</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02399" name="l02399"></a><span class="lineno"> 2399</span>{</div>
<div class="line"><a id="l02400" name="l02400"></a><span class="lineno"> 2400</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02401" name="l02401"></a><span class="lineno"> 2401</span>  SET_BIT(RCC-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l02402" name="l02402"></a><span class="lineno"> 2402</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02403" name="l02403"></a><span class="lineno"> 2403</span>  tmpreg = READ_BIT(RCC-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l02404" name="l02404"></a><span class="lineno"> 2404</span>  (void)tmpreg;</div>
<div class="line"><a id="l02405" name="l02405"></a><span class="lineno"> 2405</span>}</div>
<div class="line"><a id="l02406" name="l02406"></a><span class="lineno"> 2406</span></div>
<div class="line"><a id="l02426" name="l02426"></a><span class="lineno"> 2426</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB1_GRP2_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02427" name="l02427"></a><span class="lineno"> 2427</span>{</div>
<div class="line"><a id="l02428" name="l02428"></a><span class="lineno"> 2428</span>  CLEAR_BIT(RCC-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l02429" name="l02429"></a><span class="lineno"> 2429</span>}</div>
<div class="line"><a id="l02430" name="l02430"></a><span class="lineno"> 2430</span></div>
<div class="line"><a id="l02434" name="l02434"></a><span class="lineno"> 2434</span></div>
<div class="line"><a id="l02438" name="l02438"></a><span class="lineno"> 2438</span></div>
<div class="line"><a id="l02480" name="l02480"></a><span class="lineno"> 2480</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02481" name="l02481"></a><span class="lineno"> 2481</span>{</div>
<div class="line"><a id="l02482" name="l02482"></a><span class="lineno"> 2482</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02483" name="l02483"></a><span class="lineno"> 2483</span>  SET_BIT(RCC-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l02484" name="l02484"></a><span class="lineno"> 2484</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02485" name="l02485"></a><span class="lineno"> 2485</span>  tmpreg = READ_BIT(RCC-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l02486" name="l02486"></a><span class="lineno"> 2486</span>  (void)tmpreg;</div>
<div class="line"><a id="l02487" name="l02487"></a><span class="lineno"> 2487</span>}</div>
<div class="line"><a id="l02488" name="l02488"></a><span class="lineno"> 2488</span></div>
<div class="line"><a id="l02530" name="l02530"></a><span class="lineno"> 2530</span>__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l02531" name="l02531"></a><span class="lineno"> 2531</span>{</div>
<div class="line"><a id="l02532" name="l02532"></a><span class="lineno"> 2532</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;APB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l02533" name="l02533"></a><span class="lineno"> 2533</span>}</div>
<div class="line"><a id="l02534" name="l02534"></a><span class="lineno"> 2534</span></div>
<div class="line"><a id="l02576" name="l02576"></a><span class="lineno"> 2576</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02577" name="l02577"></a><span class="lineno"> 2577</span>{</div>
<div class="line"><a id="l02578" name="l02578"></a><span class="lineno"> 2578</span>  CLEAR_BIT(RCC-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l02579" name="l02579"></a><span class="lineno"> 2579</span>}</div>
<div class="line"><a id="l02580" name="l02580"></a><span class="lineno"> 2580</span></div>
<div class="line"><a id="l02622" name="l02622"></a><span class="lineno"> 2622</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l02623" name="l02623"></a><span class="lineno"> 2623</span>{</div>
<div class="line"><a id="l02624" name="l02624"></a><span class="lineno"> 2624</span>  SET_BIT(RCC-&gt;APB2RSTR, Periphs);</div>
<div class="line"><a id="l02625" name="l02625"></a><span class="lineno"> 2625</span>}</div>
<div class="line"><a id="l02626" name="l02626"></a><span class="lineno"> 2626</span></div>
<div class="line"><a id="l02668" name="l02668"></a><span class="lineno"> 2668</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l02669" name="l02669"></a><span class="lineno"> 2669</span>{</div>
<div class="line"><a id="l02670" name="l02670"></a><span class="lineno"> 2670</span>  CLEAR_BIT(RCC-&gt;APB2RSTR, Periphs);</div>
<div class="line"><a id="l02671" name="l02671"></a><span class="lineno"> 2671</span>}</div>
<div class="line"><a id="l02672" name="l02672"></a><span class="lineno"> 2672</span></div>
<div class="line"><a id="l02714" name="l02714"></a><span class="lineno"> 2714</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02715" name="l02715"></a><span class="lineno"> 2715</span>{</div>
<div class="line"><a id="l02716" name="l02716"></a><span class="lineno"> 2716</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02717" name="l02717"></a><span class="lineno"> 2717</span>  SET_BIT(RCC-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l02718" name="l02718"></a><span class="lineno"> 2718</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02719" name="l02719"></a><span class="lineno"> 2719</span>  tmpreg = READ_BIT(RCC-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l02720" name="l02720"></a><span class="lineno"> 2720</span>  (void)tmpreg;</div>
<div class="line"><a id="l02721" name="l02721"></a><span class="lineno"> 2721</span>}</div>
<div class="line"><a id="l02722" name="l02722"></a><span class="lineno"> 2722</span></div>
<div class="line"><a id="l02764" name="l02764"></a><span class="lineno"> 2764</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l02765" name="l02765"></a><span class="lineno"> 2765</span>{</div>
<div class="line"><a id="l02766" name="l02766"></a><span class="lineno"> 2766</span>  CLEAR_BIT(RCC-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l02767" name="l02767"></a><span class="lineno"> 2767</span>}</div>
<div class="line"><a id="l02768" name="l02768"></a><span class="lineno"> 2768</span></div>
<div class="line"><a id="l02772" name="l02772"></a><span class="lineno"> 2772</span></div>
<div class="line"><a id="l02776" name="l02776"></a><span class="lineno"> 2776</span></div>
<div class="line"><a id="l02814" name="l02814"></a><span class="lineno"> 2814</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02815" name="l02815"></a><span class="lineno"> 2815</span>{</div>
<div class="line"><a id="l02816" name="l02816"></a><span class="lineno"> 2816</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l02817" name="l02817"></a><span class="lineno"> 2817</span>  SET_BIT(RCC-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l02818" name="l02818"></a><span class="lineno"> 2818</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l02819" name="l02819"></a><span class="lineno"> 2819</span>  tmpreg = READ_BIT(RCC-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l02820" name="l02820"></a><span class="lineno"> 2820</span>  (void)tmpreg;</div>
<div class="line"><a id="l02821" name="l02821"></a><span class="lineno"> 2821</span>}</div>
<div class="line"><a id="l02822" name="l02822"></a><span class="lineno"> 2822</span></div>
<div class="line"><a id="l02860" name="l02860"></a><span class="lineno"> 2860</span>__STATIC_INLINE uint32_t LL_APB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l02861" name="l02861"></a><span class="lineno"> 2861</span>{</div>
<div class="line"><a id="l02862" name="l02862"></a><span class="lineno"> 2862</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC-&gt;APB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l02863" name="l02863"></a><span class="lineno"> 2863</span>}</div>
<div class="line"><a id="l02864" name="l02864"></a><span class="lineno"> 2864</span></div>
<div class="line"><a id="l02902" name="l02902"></a><span class="lineno"> 2902</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l02903" name="l02903"></a><span class="lineno"> 2903</span>{</div>
<div class="line"><a id="l02904" name="l02904"></a><span class="lineno"> 2904</span>  CLEAR_BIT(RCC-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l02905" name="l02905"></a><span class="lineno"> 2905</span>}</div>
<div class="line"><a id="l02906" name="l02906"></a><span class="lineno"> 2906</span></div>
<div class="line"><a id="l02942" name="l02942"></a><span class="lineno"> 2942</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_ForceReset(uint32_t Periphs)</div>
<div class="line"><a id="l02943" name="l02943"></a><span class="lineno"> 2943</span>{</div>
<div class="line"><a id="l02944" name="l02944"></a><span class="lineno"> 2944</span>  SET_BIT(RCC-&gt;APB4RSTR, Periphs);</div>
<div class="line"><a id="l02945" name="l02945"></a><span class="lineno"> 2945</span>}</div>
<div class="line"><a id="l02946" name="l02946"></a><span class="lineno"> 2946</span></div>
<div class="line"><a id="l02982" name="l02982"></a><span class="lineno"> 2982</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_ReleaseReset(uint32_t Periphs)</div>
<div class="line"><a id="l02983" name="l02983"></a><span class="lineno"> 2983</span>{</div>
<div class="line"><a id="l02984" name="l02984"></a><span class="lineno"> 2984</span>  CLEAR_BIT(RCC-&gt;APB4RSTR, Periphs);</div>
<div class="line"><a id="l02985" name="l02985"></a><span class="lineno"> 2985</span>}</div>
<div class="line"><a id="l02986" name="l02986"></a><span class="lineno"> 2986</span></div>
<div class="line"><a id="l03024" name="l03024"></a><span class="lineno"> 3024</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03025" name="l03025"></a><span class="lineno"> 3025</span>{</div>
<div class="line"><a id="l03026" name="l03026"></a><span class="lineno"> 3026</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03027" name="l03027"></a><span class="lineno"> 3027</span>  SET_BIT(RCC-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l03028" name="l03028"></a><span class="lineno"> 3028</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03029" name="l03029"></a><span class="lineno"> 3029</span>  tmpreg = READ_BIT(RCC-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l03030" name="l03030"></a><span class="lineno"> 3030</span>  (void)tmpreg;</div>
<div class="line"><a id="l03031" name="l03031"></a><span class="lineno"> 3031</span>}</div>
<div class="line"><a id="l03032" name="l03032"></a><span class="lineno"> 3032</span></div>
<div class="line"><a id="l03070" name="l03070"></a><span class="lineno"> 3070</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_APB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03071" name="l03071"></a><span class="lineno"> 3071</span>{</div>
<div class="line"><a id="l03072" name="l03072"></a><span class="lineno"> 3072</span>  CLEAR_BIT(RCC-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l03073" name="l03073"></a><span class="lineno"> 3073</span>}</div>
<div class="line"><a id="l03074" name="l03074"></a><span class="lineno"> 3074</span></div>
<div class="line"><a id="l03078" name="l03078"></a><span class="lineno"> 3078</span></div>
<div class="line"><a id="l03082" name="l03082"></a><span class="lineno"> 3082</span></div>
<div class="line"><a id="l03129" name="l03129"></a><span class="lineno"> 3129</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CLKAM_Enable(uint32_t Periphs)</div>
<div class="line"><a id="l03130" name="l03130"></a><span class="lineno"> 3130</span>{</div>
<div class="line"><a id="l03131" name="l03131"></a><span class="lineno"> 3131</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03132" name="l03132"></a><span class="lineno"> 3132</span> </div>
<div class="line"><a id="l03133" name="l03133"></a><span class="lineno"> 3133</span><span class="preprocessor">#if defined(RCC_D3AMR_BDMAAMEN)</span></div>
<div class="line"><a id="l03134" name="l03134"></a><span class="lineno"> 3134</span>  SET_BIT(RCC-&gt;D3AMR, Periphs);</div>
<div class="line"><a id="l03135" name="l03135"></a><span class="lineno"> 3135</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03136" name="l03136"></a><span class="lineno"> 3136</span>  tmpreg = READ_BIT(RCC-&gt;D3AMR, Periphs);</div>
<div class="line"><a id="l03137" name="l03137"></a><span class="lineno"> 3137</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l03138" name="l03138"></a><span class="lineno"> 3138</span>  SET_BIT(RCC-&gt;SRDAMR, Periphs);</div>
<div class="line"><a id="l03139" name="l03139"></a><span class="lineno"> 3139</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03140" name="l03140"></a><span class="lineno"> 3140</span>  tmpreg = READ_BIT(RCC-&gt;SRDAMR, Periphs);</div>
<div class="line"><a id="l03141" name="l03141"></a><span class="lineno"> 3141</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_BDMAAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l03142" name="l03142"></a><span class="lineno"> 3142</span>  (void)tmpreg;</div>
<div class="line"><a id="l03143" name="l03143"></a><span class="lineno"> 3143</span>}</div>
<div class="line"><a id="l03144" name="l03144"></a><span class="lineno"> 3144</span></div>
<div class="line"><a id="l03191" name="l03191"></a><span class="lineno"> 3191</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CLKAM_Disable(uint32_t Periphs)</div>
<div class="line"><a id="l03192" name="l03192"></a><span class="lineno"> 3192</span>{</div>
<div class="line"><a id="l03193" name="l03193"></a><span class="lineno"> 3193</span><span class="preprocessor">#if defined(RCC_D3AMR_BDMAAMEN)</span></div>
<div class="line"><a id="l03194" name="l03194"></a><span class="lineno"> 3194</span>  CLEAR_BIT(RCC-&gt;D3AMR, Periphs);</div>
<div class="line"><a id="l03195" name="l03195"></a><span class="lineno"> 3195</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l03196" name="l03196"></a><span class="lineno"> 3196</span>  CLEAR_BIT(RCC-&gt;SRDAMR, Periphs);</div>
<div class="line"><a id="l03197" name="l03197"></a><span class="lineno"> 3197</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_D3AMR_BDMAAMEN */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l03198" name="l03198"></a><span class="lineno"> 3198</span>}</div>
<div class="line"><a id="l03199" name="l03199"></a><span class="lineno"> 3199</span></div>
<div class="line"><a id="l03203" name="l03203"></a><span class="lineno"> 3203</span></div>
<div class="line"><a id="l03207" name="l03207"></a><span class="lineno"> 3207</span> </div>
<div class="line"><a id="l03208" name="l03208"></a><span class="lineno"> 3208</span><span class="preprocessor">#if defined(RCC_CKGAENR_AXICKG)</span></div>
<div class="line"><a id="l03209" name="l03209"></a><span class="lineno"> 3209</span> </div>
<div class="line"><a id="l03210" name="l03210"></a><span class="lineno"> 3210</span></div>
<div class="line"><a id="l03258" name="l03258"></a><span class="lineno"> 3258</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CKGA_Enable(uint32_t Periphs)</div>
<div class="line"><a id="l03259" name="l03259"></a><span class="lineno"> 3259</span>{</div>
<div class="line"><a id="l03260" name="l03260"></a><span class="lineno"> 3260</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03261" name="l03261"></a><span class="lineno"> 3261</span>  SET_BIT(RCC-&gt;CKGAENR, Periphs);</div>
<div class="line"><a id="l03262" name="l03262"></a><span class="lineno"> 3262</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03263" name="l03263"></a><span class="lineno"> 3263</span>  tmpreg = READ_BIT(RCC-&gt;CKGAENR, Periphs);</div>
<div class="line"><a id="l03264" name="l03264"></a><span class="lineno"> 3264</span>  (void)tmpreg;</div>
<div class="line"><a id="l03265" name="l03265"></a><span class="lineno"> 3265</span>}</div>
<div class="line"><a id="l03266" name="l03266"></a><span class="lineno"> 3266</span> </div>
<div class="line"><a id="l03267" name="l03267"></a><span class="lineno"> 3267</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_CKGAENR_AXICKG */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l03268" name="l03268"></a><span class="lineno"> 3268</span> </div>
<div class="line"><a id="l03269" name="l03269"></a><span class="lineno"> 3269</span><span class="preprocessor">#if defined(RCC_CKGAENR_AXICKG)</span></div>
<div class="line"><a id="l03270" name="l03270"></a><span class="lineno"> 3270</span></div>
<div class="line"><a id="l03318" name="l03318"></a><span class="lineno"> 3318</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CKGA_Disable(uint32_t Periphs)</div>
<div class="line"><a id="l03319" name="l03319"></a><span class="lineno"> 3319</span>{</div>
<div class="line"><a id="l03320" name="l03320"></a><span class="lineno"> 3320</span>  CLEAR_BIT(RCC-&gt;CKGAENR, Periphs);</div>
<div class="line"><a id="l03321" name="l03321"></a><span class="lineno"> 3321</span>}</div>
<div class="line"><a id="l03322" name="l03322"></a><span class="lineno"> 3322</span> </div>
<div class="line"><a id="l03323" name="l03323"></a><span class="lineno"> 3323</span><span class="preprocessor">#endif </span><span class="comment">/* RCC_CKGAENR_AXICKG */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l03324" name="l03324"></a><span class="lineno"> 3324</span></div>
<div class="line"><a id="l03328" name="l03328"></a><span class="lineno"> 3328</span> </div>
<div class="line"><a id="l03329" name="l03329"></a><span class="lineno"> 3329</span><span class="preprocessor">#if defined(DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l03333" name="l03333"></a><span class="lineno"> 3333</span></div>
<div class="line"><a id="l03365" name="l03365"></a><span class="lineno"> 3365</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03366" name="l03366"></a><span class="lineno"> 3366</span>{</div>
<div class="line"><a id="l03367" name="l03367"></a><span class="lineno"> 3367</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03368" name="l03368"></a><span class="lineno"> 3368</span>  SET_BIT(RCC_C1-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l03369" name="l03369"></a><span class="lineno"> 3369</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03370" name="l03370"></a><span class="lineno"> 3370</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l03371" name="l03371"></a><span class="lineno"> 3371</span>  (void)tmpreg;</div>
<div class="line"><a id="l03372" name="l03372"></a><span class="lineno"> 3372</span>}</div>
<div class="line"><a id="l03373" name="l03373"></a><span class="lineno"> 3373</span></div>
<div class="line"><a id="l03405" name="l03405"></a><span class="lineno"> 3405</span>__STATIC_INLINE uint32_t LL_C1_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l03406" name="l03406"></a><span class="lineno"> 3406</span>{</div>
<div class="line"><a id="l03407" name="l03407"></a><span class="lineno"> 3407</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;AHB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l03408" name="l03408"></a><span class="lineno"> 3408</span>}</div>
<div class="line"><a id="l03409" name="l03409"></a><span class="lineno"> 3409</span></div>
<div class="line"><a id="l03441" name="l03441"></a><span class="lineno"> 3441</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03442" name="l03442"></a><span class="lineno"> 3442</span>{</div>
<div class="line"><a id="l03443" name="l03443"></a><span class="lineno"> 3443</span>  CLEAR_BIT(RCC_C1-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l03444" name="l03444"></a><span class="lineno"> 3444</span>}</div>
<div class="line"><a id="l03445" name="l03445"></a><span class="lineno"> 3445</span></div>
<div class="line"><a id="l03486" name="l03486"></a><span class="lineno"> 3486</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03487" name="l03487"></a><span class="lineno"> 3487</span>{</div>
<div class="line"><a id="l03488" name="l03488"></a><span class="lineno"> 3488</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03489" name="l03489"></a><span class="lineno"> 3489</span>  SET_BIT(RCC_C1-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l03490" name="l03490"></a><span class="lineno"> 3490</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03491" name="l03491"></a><span class="lineno"> 3491</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l03492" name="l03492"></a><span class="lineno"> 3492</span>  (void)tmpreg;</div>
<div class="line"><a id="l03493" name="l03493"></a><span class="lineno"> 3493</span>}</div>
<div class="line"><a id="l03494" name="l03494"></a><span class="lineno"> 3494</span></div>
<div class="line"><a id="l03535" name="l03535"></a><span class="lineno"> 3535</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03536" name="l03536"></a><span class="lineno"> 3536</span>{</div>
<div class="line"><a id="l03537" name="l03537"></a><span class="lineno"> 3537</span>  CLEAR_BIT(RCC_C1-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l03538" name="l03538"></a><span class="lineno"> 3538</span>}</div>
<div class="line"><a id="l03539" name="l03539"></a><span class="lineno"> 3539</span></div>
<div class="line"><a id="l03543" name="l03543"></a><span class="lineno"> 3543</span></div>
<div class="line"><a id="l03547" name="l03547"></a><span class="lineno"> 3547</span></div>
<div class="line"><a id="l03579" name="l03579"></a><span class="lineno"> 3579</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03580" name="l03580"></a><span class="lineno"> 3580</span>{</div>
<div class="line"><a id="l03581" name="l03581"></a><span class="lineno"> 3581</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03582" name="l03582"></a><span class="lineno"> 3582</span>  SET_BIT(RCC_C1-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l03583" name="l03583"></a><span class="lineno"> 3583</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03584" name="l03584"></a><span class="lineno"> 3584</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l03585" name="l03585"></a><span class="lineno"> 3585</span>  (void)tmpreg;</div>
<div class="line"><a id="l03586" name="l03586"></a><span class="lineno"> 3586</span>}</div>
<div class="line"><a id="l03587" name="l03587"></a><span class="lineno"> 3587</span></div>
<div class="line"><a id="l03619" name="l03619"></a><span class="lineno"> 3619</span>__STATIC_INLINE uint32_t LL_C1_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l03620" name="l03620"></a><span class="lineno"> 3620</span>{</div>
<div class="line"><a id="l03621" name="l03621"></a><span class="lineno"> 3621</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;AHB1ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l03622" name="l03622"></a><span class="lineno"> 3622</span>}</div>
<div class="line"><a id="l03623" name="l03623"></a><span class="lineno"> 3623</span></div>
<div class="line"><a id="l03655" name="l03655"></a><span class="lineno"> 3655</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03656" name="l03656"></a><span class="lineno"> 3656</span>{</div>
<div class="line"><a id="l03657" name="l03657"></a><span class="lineno"> 3657</span>  CLEAR_BIT(RCC_C1-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l03658" name="l03658"></a><span class="lineno"> 3658</span>}</div>
<div class="line"><a id="l03659" name="l03659"></a><span class="lineno"> 3659</span></div>
<div class="line"><a id="l03691" name="l03691"></a><span class="lineno"> 3691</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03692" name="l03692"></a><span class="lineno"> 3692</span>{</div>
<div class="line"><a id="l03693" name="l03693"></a><span class="lineno"> 3693</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03694" name="l03694"></a><span class="lineno"> 3694</span>  SET_BIT(RCC_C1-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l03695" name="l03695"></a><span class="lineno"> 3695</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03696" name="l03696"></a><span class="lineno"> 3696</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l03697" name="l03697"></a><span class="lineno"> 3697</span>  (void)tmpreg;</div>
<div class="line"><a id="l03698" name="l03698"></a><span class="lineno"> 3698</span>}</div>
<div class="line"><a id="l03699" name="l03699"></a><span class="lineno"> 3699</span></div>
<div class="line"><a id="l03731" name="l03731"></a><span class="lineno"> 3731</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03732" name="l03732"></a><span class="lineno"> 3732</span>{</div>
<div class="line"><a id="l03733" name="l03733"></a><span class="lineno"> 3733</span>  CLEAR_BIT(RCC_C1-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l03734" name="l03734"></a><span class="lineno"> 3734</span>}</div>
<div class="line"><a id="l03735" name="l03735"></a><span class="lineno"> 3735</span></div>
<div class="line"><a id="l03739" name="l03739"></a><span class="lineno"> 3739</span></div>
<div class="line"><a id="l03743" name="l03743"></a><span class="lineno"> 3743</span></div>
<div class="line"><a id="l03771" name="l03771"></a><span class="lineno"> 3771</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03772" name="l03772"></a><span class="lineno"> 3772</span>{</div>
<div class="line"><a id="l03773" name="l03773"></a><span class="lineno"> 3773</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03774" name="l03774"></a><span class="lineno"> 3774</span>  SET_BIT(RCC_C1-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l03775" name="l03775"></a><span class="lineno"> 3775</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03776" name="l03776"></a><span class="lineno"> 3776</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l03777" name="l03777"></a><span class="lineno"> 3777</span>  (void)tmpreg;</div>
<div class="line"><a id="l03778" name="l03778"></a><span class="lineno"> 3778</span>}</div>
<div class="line"><a id="l03779" name="l03779"></a><span class="lineno"> 3779</span></div>
<div class="line"><a id="l03807" name="l03807"></a><span class="lineno"> 3807</span>__STATIC_INLINE uint32_t LL_C1_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l03808" name="l03808"></a><span class="lineno"> 3808</span>{</div>
<div class="line"><a id="l03809" name="l03809"></a><span class="lineno"> 3809</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;AHB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l03810" name="l03810"></a><span class="lineno"> 3810</span>}</div>
<div class="line"><a id="l03811" name="l03811"></a><span class="lineno"> 3811</span></div>
<div class="line"><a id="l03839" name="l03839"></a><span class="lineno"> 3839</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03840" name="l03840"></a><span class="lineno"> 3840</span>{</div>
<div class="line"><a id="l03841" name="l03841"></a><span class="lineno"> 3841</span>  CLEAR_BIT(RCC_C1-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l03842" name="l03842"></a><span class="lineno"> 3842</span>}</div>
<div class="line"><a id="l03843" name="l03843"></a><span class="lineno"> 3843</span></div>
<div class="line"><a id="l03869" name="l03869"></a><span class="lineno"> 3869</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03870" name="l03870"></a><span class="lineno"> 3870</span>{</div>
<div class="line"><a id="l03871" name="l03871"></a><span class="lineno"> 3871</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03872" name="l03872"></a><span class="lineno"> 3872</span>  SET_BIT(RCC_C1-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l03873" name="l03873"></a><span class="lineno"> 3873</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03874" name="l03874"></a><span class="lineno"> 3874</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l03875" name="l03875"></a><span class="lineno"> 3875</span>  (void)tmpreg;</div>
<div class="line"><a id="l03876" name="l03876"></a><span class="lineno"> 3876</span>}</div>
<div class="line"><a id="l03877" name="l03877"></a><span class="lineno"> 3877</span></div>
<div class="line"><a id="l03903" name="l03903"></a><span class="lineno"> 3903</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l03904" name="l03904"></a><span class="lineno"> 3904</span>{</div>
<div class="line"><a id="l03905" name="l03905"></a><span class="lineno"> 3905</span>  CLEAR_BIT(RCC_C1-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l03906" name="l03906"></a><span class="lineno"> 3906</span>}</div>
<div class="line"><a id="l03907" name="l03907"></a><span class="lineno"> 3907</span></div>
<div class="line"><a id="l03911" name="l03911"></a><span class="lineno"> 3911</span></div>
<div class="line"><a id="l03915" name="l03915"></a><span class="lineno"> 3915</span></div>
<div class="line"><a id="l03957" name="l03957"></a><span class="lineno"> 3957</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l03958" name="l03958"></a><span class="lineno"> 3958</span>{</div>
<div class="line"><a id="l03959" name="l03959"></a><span class="lineno"> 3959</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l03960" name="l03960"></a><span class="lineno"> 3960</span>  SET_BIT(RCC_C1-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l03961" name="l03961"></a><span class="lineno"> 3961</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l03962" name="l03962"></a><span class="lineno"> 3962</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l03963" name="l03963"></a><span class="lineno"> 3963</span>  (void)tmpreg;</div>
<div class="line"><a id="l03964" name="l03964"></a><span class="lineno"> 3964</span>}</div>
<div class="line"><a id="l03965" name="l03965"></a><span class="lineno"> 3965</span></div>
<div class="line"><a id="l04007" name="l04007"></a><span class="lineno"> 4007</span>__STATIC_INLINE uint32_t LL_C1_AHB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l04008" name="l04008"></a><span class="lineno"> 4008</span>{</div>
<div class="line"><a id="l04009" name="l04009"></a><span class="lineno"> 4009</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;AHB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l04010" name="l04010"></a><span class="lineno"> 4010</span>}</div>
<div class="line"><a id="l04011" name="l04011"></a><span class="lineno"> 4011</span></div>
<div class="line"><a id="l04053" name="l04053"></a><span class="lineno"> 4053</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04054" name="l04054"></a><span class="lineno"> 4054</span>{</div>
<div class="line"><a id="l04055" name="l04055"></a><span class="lineno"> 4055</span>  CLEAR_BIT(RCC_C1-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l04056" name="l04056"></a><span class="lineno"> 4056</span>}</div>
<div class="line"><a id="l04057" name="l04057"></a><span class="lineno"> 4057</span></div>
<div class="line"><a id="l04095" name="l04095"></a><span class="lineno"> 4095</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04096" name="l04096"></a><span class="lineno"> 4096</span>{</div>
<div class="line"><a id="l04097" name="l04097"></a><span class="lineno"> 4097</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04098" name="l04098"></a><span class="lineno"> 4098</span>  SET_BIT(RCC_C1-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l04099" name="l04099"></a><span class="lineno"> 4099</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04100" name="l04100"></a><span class="lineno"> 4100</span>  tmpreg = READ_BIT(RCC_C1-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l04101" name="l04101"></a><span class="lineno"> 4101</span>  (void)tmpreg;</div>
<div class="line"><a id="l04102" name="l04102"></a><span class="lineno"> 4102</span>}</div>
<div class="line"><a id="l04103" name="l04103"></a><span class="lineno"> 4103</span></div>
<div class="line"><a id="l04141" name="l04141"></a><span class="lineno"> 4141</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_AHB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04142" name="l04142"></a><span class="lineno"> 4142</span>{</div>
<div class="line"><a id="l04143" name="l04143"></a><span class="lineno"> 4143</span>  CLEAR_BIT(RCC_C1-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l04144" name="l04144"></a><span class="lineno"> 4144</span>}</div>
<div class="line"><a id="l04145" name="l04145"></a><span class="lineno"> 4145</span></div>
<div class="line"><a id="l04149" name="l04149"></a><span class="lineno"> 4149</span></div>
<div class="line"><a id="l04153" name="l04153"></a><span class="lineno"> 4153</span></div>
<div class="line"><a id="l04167" name="l04167"></a><span class="lineno"> 4167</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04168" name="l04168"></a><span class="lineno"> 4168</span>{</div>
<div class="line"><a id="l04169" name="l04169"></a><span class="lineno"> 4169</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04170" name="l04170"></a><span class="lineno"> 4170</span>  SET_BIT(RCC_C1-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l04171" name="l04171"></a><span class="lineno"> 4171</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04172" name="l04172"></a><span class="lineno"> 4172</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l04173" name="l04173"></a><span class="lineno"> 4173</span>  (void)tmpreg;</div>
<div class="line"><a id="l04174" name="l04174"></a><span class="lineno"> 4174</span>}</div>
<div class="line"><a id="l04175" name="l04175"></a><span class="lineno"> 4175</span></div>
<div class="line"><a id="l04189" name="l04189"></a><span class="lineno"> 4189</span>__STATIC_INLINE uint32_t LL_C1_APB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l04190" name="l04190"></a><span class="lineno"> 4190</span>{</div>
<div class="line"><a id="l04191" name="l04191"></a><span class="lineno"> 4191</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;APB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l04192" name="l04192"></a><span class="lineno"> 4192</span>}</div>
<div class="line"><a id="l04193" name="l04193"></a><span class="lineno"> 4193</span></div>
<div class="line"><a id="l04208" name="l04208"></a><span class="lineno"> 4208</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04209" name="l04209"></a><span class="lineno"> 4209</span>{</div>
<div class="line"><a id="l04210" name="l04210"></a><span class="lineno"> 4210</span>  CLEAR_BIT(RCC_C1-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l04211" name="l04211"></a><span class="lineno"> 4211</span>}</div>
<div class="line"><a id="l04212" name="l04212"></a><span class="lineno"> 4212</span></div>
<div class="line"><a id="l04226" name="l04226"></a><span class="lineno"> 4226</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04227" name="l04227"></a><span class="lineno"> 4227</span>{</div>
<div class="line"><a id="l04228" name="l04228"></a><span class="lineno"> 4228</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04229" name="l04229"></a><span class="lineno"> 4229</span>  SET_BIT(RCC_C1-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l04230" name="l04230"></a><span class="lineno"> 4230</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04231" name="l04231"></a><span class="lineno"> 4231</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l04232" name="l04232"></a><span class="lineno"> 4232</span>  (void)tmpreg;</div>
<div class="line"><a id="l04233" name="l04233"></a><span class="lineno"> 4233</span>}</div>
<div class="line"><a id="l04234" name="l04234"></a><span class="lineno"> 4234</span></div>
<div class="line"><a id="l04248" name="l04248"></a><span class="lineno"> 4248</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04249" name="l04249"></a><span class="lineno"> 4249</span>{</div>
<div class="line"><a id="l04250" name="l04250"></a><span class="lineno"> 4250</span>  CLEAR_BIT(RCC_C1-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l04251" name="l04251"></a><span class="lineno"> 4251</span>}</div>
<div class="line"><a id="l04252" name="l04252"></a><span class="lineno"> 4252</span></div>
<div class="line"><a id="l04256" name="l04256"></a><span class="lineno"> 4256</span></div>
<div class="line"><a id="l04260" name="l04260"></a><span class="lineno"> 4260</span></div>
<div class="line"><a id="l04318" name="l04318"></a><span class="lineno"> 4318</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04319" name="l04319"></a><span class="lineno"> 4319</span>{</div>
<div class="line"><a id="l04320" name="l04320"></a><span class="lineno"> 4320</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04321" name="l04321"></a><span class="lineno"> 4321</span>  SET_BIT(RCC_C1-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l04322" name="l04322"></a><span class="lineno"> 4322</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04323" name="l04323"></a><span class="lineno"> 4323</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l04324" name="l04324"></a><span class="lineno"> 4324</span>  (void)tmpreg;</div>
<div class="line"><a id="l04325" name="l04325"></a><span class="lineno"> 4325</span>}</div>
<div class="line"><a id="l04326" name="l04326"></a><span class="lineno"> 4326</span></div>
<div class="line"><a id="l04384" name="l04384"></a><span class="lineno"> 4384</span>__STATIC_INLINE uint32_t LL_C1_APB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l04385" name="l04385"></a><span class="lineno"> 4385</span>{</div>
<div class="line"><a id="l04386" name="l04386"></a><span class="lineno"> 4386</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;APB1LENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l04387" name="l04387"></a><span class="lineno"> 4387</span>}</div>
<div class="line"><a id="l04388" name="l04388"></a><span class="lineno"> 4388</span></div>
<div class="line"><a id="l04446" name="l04446"></a><span class="lineno"> 4446</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04447" name="l04447"></a><span class="lineno"> 4447</span>{</div>
<div class="line"><a id="l04448" name="l04448"></a><span class="lineno"> 4448</span>  CLEAR_BIT(RCC_C1-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l04449" name="l04449"></a><span class="lineno"> 4449</span>}</div>
<div class="line"><a id="l04450" name="l04450"></a><span class="lineno"> 4450</span></div>
<div class="line"><a id="l04508" name="l04508"></a><span class="lineno"> 4508</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04509" name="l04509"></a><span class="lineno"> 4509</span>{</div>
<div class="line"><a id="l04510" name="l04510"></a><span class="lineno"> 4510</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04511" name="l04511"></a><span class="lineno"> 4511</span>  SET_BIT(RCC_C1-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l04512" name="l04512"></a><span class="lineno"> 4512</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04513" name="l04513"></a><span class="lineno"> 4513</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l04514" name="l04514"></a><span class="lineno"> 4514</span>  (void)tmpreg;</div>
<div class="line"><a id="l04515" name="l04515"></a><span class="lineno"> 4515</span>}</div>
<div class="line"><a id="l04516" name="l04516"></a><span class="lineno"> 4516</span></div>
<div class="line"><a id="l04574" name="l04574"></a><span class="lineno"> 4574</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04575" name="l04575"></a><span class="lineno"> 4575</span>{</div>
<div class="line"><a id="l04576" name="l04576"></a><span class="lineno"> 4576</span>  CLEAR_BIT(RCC_C1-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l04577" name="l04577"></a><span class="lineno"> 4577</span>}</div>
<div class="line"><a id="l04578" name="l04578"></a><span class="lineno"> 4578</span></div>
<div class="line"><a id="l04598" name="l04598"></a><span class="lineno"> 4598</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP2_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04599" name="l04599"></a><span class="lineno"> 4599</span>{</div>
<div class="line"><a id="l04600" name="l04600"></a><span class="lineno"> 4600</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04601" name="l04601"></a><span class="lineno"> 4601</span>  SET_BIT(RCC_C1-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l04602" name="l04602"></a><span class="lineno"> 4602</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04603" name="l04603"></a><span class="lineno"> 4603</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l04604" name="l04604"></a><span class="lineno"> 4604</span>  (void)tmpreg;</div>
<div class="line"><a id="l04605" name="l04605"></a><span class="lineno"> 4605</span>}</div>
<div class="line"><a id="l04606" name="l04606"></a><span class="lineno"> 4606</span></div>
<div class="line"><a id="l04626" name="l04626"></a><span class="lineno"> 4626</span>__STATIC_INLINE uint32_t LL_C1_APB1_GRP2_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l04627" name="l04627"></a><span class="lineno"> 4627</span>{</div>
<div class="line"><a id="l04628" name="l04628"></a><span class="lineno"> 4628</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;APB1HENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l04629" name="l04629"></a><span class="lineno"> 4629</span>}</div>
<div class="line"><a id="l04630" name="l04630"></a><span class="lineno"> 4630</span></div>
<div class="line"><a id="l04650" name="l04650"></a><span class="lineno"> 4650</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP2_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04651" name="l04651"></a><span class="lineno"> 4651</span>{</div>
<div class="line"><a id="l04652" name="l04652"></a><span class="lineno"> 4652</span>  CLEAR_BIT(RCC_C1-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l04653" name="l04653"></a><span class="lineno"> 4653</span>}</div>
<div class="line"><a id="l04654" name="l04654"></a><span class="lineno"> 4654</span></div>
<div class="line"><a id="l04674" name="l04674"></a><span class="lineno"> 4674</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP2_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04675" name="l04675"></a><span class="lineno"> 4675</span>{</div>
<div class="line"><a id="l04676" name="l04676"></a><span class="lineno"> 4676</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04677" name="l04677"></a><span class="lineno"> 4677</span>  SET_BIT(RCC_C1-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l04678" name="l04678"></a><span class="lineno"> 4678</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04679" name="l04679"></a><span class="lineno"> 4679</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l04680" name="l04680"></a><span class="lineno"> 4680</span>  (void)tmpreg;</div>
<div class="line"><a id="l04681" name="l04681"></a><span class="lineno"> 4681</span>}</div>
<div class="line"><a id="l04682" name="l04682"></a><span class="lineno"> 4682</span></div>
<div class="line"><a id="l04702" name="l04702"></a><span class="lineno"> 4702</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB1_GRP2_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04703" name="l04703"></a><span class="lineno"> 4703</span>{</div>
<div class="line"><a id="l04704" name="l04704"></a><span class="lineno"> 4704</span>  CLEAR_BIT(RCC_C1-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l04705" name="l04705"></a><span class="lineno"> 4705</span>}</div>
<div class="line"><a id="l04706" name="l04706"></a><span class="lineno"> 4706</span></div>
<div class="line"><a id="l04710" name="l04710"></a><span class="lineno"> 4710</span></div>
<div class="line"><a id="l04714" name="l04714"></a><span class="lineno"> 4714</span></div>
<div class="line"><a id="l04756" name="l04756"></a><span class="lineno"> 4756</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04757" name="l04757"></a><span class="lineno"> 4757</span>{</div>
<div class="line"><a id="l04758" name="l04758"></a><span class="lineno"> 4758</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04759" name="l04759"></a><span class="lineno"> 4759</span>  SET_BIT(RCC_C1-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l04760" name="l04760"></a><span class="lineno"> 4760</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04761" name="l04761"></a><span class="lineno"> 4761</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l04762" name="l04762"></a><span class="lineno"> 4762</span>  (void)tmpreg;</div>
<div class="line"><a id="l04763" name="l04763"></a><span class="lineno"> 4763</span>}</div>
<div class="line"><a id="l04764" name="l04764"></a><span class="lineno"> 4764</span></div>
<div class="line"><a id="l04806" name="l04806"></a><span class="lineno"> 4806</span>__STATIC_INLINE uint32_t LL_C1_APB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l04807" name="l04807"></a><span class="lineno"> 4807</span>{</div>
<div class="line"><a id="l04808" name="l04808"></a><span class="lineno"> 4808</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;APB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l04809" name="l04809"></a><span class="lineno"> 4809</span>}</div>
<div class="line"><a id="l04810" name="l04810"></a><span class="lineno"> 4810</span></div>
<div class="line"><a id="l04852" name="l04852"></a><span class="lineno"> 4852</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04853" name="l04853"></a><span class="lineno"> 4853</span>{</div>
<div class="line"><a id="l04854" name="l04854"></a><span class="lineno"> 4854</span>  CLEAR_BIT(RCC_C1-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l04855" name="l04855"></a><span class="lineno"> 4855</span>}</div>
<div class="line"><a id="l04856" name="l04856"></a><span class="lineno"> 4856</span></div>
<div class="line"><a id="l04898" name="l04898"></a><span class="lineno"> 4898</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04899" name="l04899"></a><span class="lineno"> 4899</span>{</div>
<div class="line"><a id="l04900" name="l04900"></a><span class="lineno"> 4900</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l04901" name="l04901"></a><span class="lineno"> 4901</span>  SET_BIT(RCC_C1-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l04902" name="l04902"></a><span class="lineno"> 4902</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l04903" name="l04903"></a><span class="lineno"> 4903</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l04904" name="l04904"></a><span class="lineno"> 4904</span>  (void)tmpreg;</div>
<div class="line"><a id="l04905" name="l04905"></a><span class="lineno"> 4905</span>}</div>
<div class="line"><a id="l04906" name="l04906"></a><span class="lineno"> 4906</span></div>
<div class="line"><a id="l04948" name="l04948"></a><span class="lineno"> 4948</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l04949" name="l04949"></a><span class="lineno"> 4949</span>{</div>
<div class="line"><a id="l04950" name="l04950"></a><span class="lineno"> 4950</span>  CLEAR_BIT(RCC_C1-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l04951" name="l04951"></a><span class="lineno"> 4951</span>}</div>
<div class="line"><a id="l04952" name="l04952"></a><span class="lineno"> 4952</span></div>
<div class="line"><a id="l04956" name="l04956"></a><span class="lineno"> 4956</span></div>
<div class="line"><a id="l04960" name="l04960"></a><span class="lineno"> 4960</span></div>
<div class="line"><a id="l04997" name="l04997"></a><span class="lineno"> 4997</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l04998" name="l04998"></a><span class="lineno"> 4998</span>{</div>
<div class="line"><a id="l04999" name="l04999"></a><span class="lineno"> 4999</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05000" name="l05000"></a><span class="lineno"> 5000</span>  SET_BIT(RCC_C1-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l05001" name="l05001"></a><span class="lineno"> 5001</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05002" name="l05002"></a><span class="lineno"> 5002</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l05003" name="l05003"></a><span class="lineno"> 5003</span>  (void)tmpreg;</div>
<div class="line"><a id="l05004" name="l05004"></a><span class="lineno"> 5004</span>}</div>
<div class="line"><a id="l05005" name="l05005"></a><span class="lineno"> 5005</span></div>
<div class="line"><a id="l05040" name="l05040"></a><span class="lineno"> 5040</span>__STATIC_INLINE uint32_t LL_C1_APB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05041" name="l05041"></a><span class="lineno"> 5041</span>{</div>
<div class="line"><a id="l05042" name="l05042"></a><span class="lineno"> 5042</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C1-&gt;APB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05043" name="l05043"></a><span class="lineno"> 5043</span>}</div>
<div class="line"><a id="l05044" name="l05044"></a><span class="lineno"> 5044</span></div>
<div class="line"><a id="l05080" name="l05080"></a><span class="lineno"> 5080</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05081" name="l05081"></a><span class="lineno"> 5081</span>{</div>
<div class="line"><a id="l05082" name="l05082"></a><span class="lineno"> 5082</span>  CLEAR_BIT(RCC_C1-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l05083" name="l05083"></a><span class="lineno"> 5083</span>}</div>
<div class="line"><a id="l05084" name="l05084"></a><span class="lineno"> 5084</span></div>
<div class="line"><a id="l05120" name="l05120"></a><span class="lineno"> 5120</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05121" name="l05121"></a><span class="lineno"> 5121</span>{</div>
<div class="line"><a id="l05122" name="l05122"></a><span class="lineno"> 5122</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05123" name="l05123"></a><span class="lineno"> 5123</span>  SET_BIT(RCC_C1-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l05124" name="l05124"></a><span class="lineno"> 5124</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05125" name="l05125"></a><span class="lineno"> 5125</span>  tmpreg = READ_BIT(RCC_C1-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l05126" name="l05126"></a><span class="lineno"> 5126</span>  (void)tmpreg;</div>
<div class="line"><a id="l05127" name="l05127"></a><span class="lineno"> 5127</span>}</div>
<div class="line"><a id="l05128" name="l05128"></a><span class="lineno"> 5128</span></div>
<div class="line"><a id="l05164" name="l05164"></a><span class="lineno"> 5164</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C1_APB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05165" name="l05165"></a><span class="lineno"> 5165</span>{</div>
<div class="line"><a id="l05166" name="l05166"></a><span class="lineno"> 5166</span>  CLEAR_BIT(RCC_C1-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l05167" name="l05167"></a><span class="lineno"> 5167</span>}</div>
<div class="line"><a id="l05168" name="l05168"></a><span class="lineno"> 5168</span></div>
<div class="line"><a id="l05172" name="l05172"></a><span class="lineno"> 5172</span></div>
<div class="line"><a id="l05176" name="l05176"></a><span class="lineno"> 5176</span></div>
<div class="line"><a id="l05204" name="l05204"></a><span class="lineno"> 5204</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05205" name="l05205"></a><span class="lineno"> 5205</span>{</div>
<div class="line"><a id="l05206" name="l05206"></a><span class="lineno"> 5206</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05207" name="l05207"></a><span class="lineno"> 5207</span>  SET_BIT(RCC_C2-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l05208" name="l05208"></a><span class="lineno"> 5208</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05209" name="l05209"></a><span class="lineno"> 5209</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l05210" name="l05210"></a><span class="lineno"> 5210</span>  (void)tmpreg;</div>
<div class="line"><a id="l05211" name="l05211"></a><span class="lineno"> 5211</span>}</div>
<div class="line"><a id="l05212" name="l05212"></a><span class="lineno"> 5212</span></div>
<div class="line"><a id="l05240" name="l05240"></a><span class="lineno"> 5240</span>__STATIC_INLINE uint32_t LL_C2_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05241" name="l05241"></a><span class="lineno"> 5241</span>{</div>
<div class="line"><a id="l05242" name="l05242"></a><span class="lineno"> 5242</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;AHB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05243" name="l05243"></a><span class="lineno"> 5243</span>}</div>
<div class="line"><a id="l05244" name="l05244"></a><span class="lineno"> 5244</span></div>
<div class="line"><a id="l05272" name="l05272"></a><span class="lineno"> 5272</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05273" name="l05273"></a><span class="lineno"> 5273</span>{</div>
<div class="line"><a id="l05274" name="l05274"></a><span class="lineno"> 5274</span>  CLEAR_BIT(RCC_C2-&gt;AHB3ENR, Periphs);</div>
<div class="line"><a id="l05275" name="l05275"></a><span class="lineno"> 5275</span>}</div>
<div class="line"><a id="l05276" name="l05276"></a><span class="lineno"> 5276</span></div>
<div class="line"><a id="l05303" name="l05303"></a><span class="lineno"> 5303</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05304" name="l05304"></a><span class="lineno"> 5304</span>{</div>
<div class="line"><a id="l05305" name="l05305"></a><span class="lineno"> 5305</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05306" name="l05306"></a><span class="lineno"> 5306</span>  SET_BIT(RCC_C2-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l05307" name="l05307"></a><span class="lineno"> 5307</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05308" name="l05308"></a><span class="lineno"> 5308</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l05309" name="l05309"></a><span class="lineno"> 5309</span>  (void)tmpreg;</div>
<div class="line"><a id="l05310" name="l05310"></a><span class="lineno"> 5310</span>}</div>
<div class="line"><a id="l05311" name="l05311"></a><span class="lineno"> 5311</span></div>
<div class="line"><a id="l05338" name="l05338"></a><span class="lineno"> 5338</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05339" name="l05339"></a><span class="lineno"> 5339</span>{</div>
<div class="line"><a id="l05340" name="l05340"></a><span class="lineno"> 5340</span>  CLEAR_BIT(RCC_C2-&gt;AHB3LPENR, Periphs);</div>
<div class="line"><a id="l05341" name="l05341"></a><span class="lineno"> 5341</span>}</div>
<div class="line"><a id="l05342" name="l05342"></a><span class="lineno"> 5342</span></div>
<div class="line"><a id="l05346" name="l05346"></a><span class="lineno"> 5346</span></div>
<div class="line"><a id="l05350" name="l05350"></a><span class="lineno"> 5350</span></div>
<div class="line"><a id="l05380" name="l05380"></a><span class="lineno"> 5380</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05381" name="l05381"></a><span class="lineno"> 5381</span>{</div>
<div class="line"><a id="l05382" name="l05382"></a><span class="lineno"> 5382</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05383" name="l05383"></a><span class="lineno"> 5383</span>  SET_BIT(RCC_C2-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l05384" name="l05384"></a><span class="lineno"> 5384</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05385" name="l05385"></a><span class="lineno"> 5385</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l05386" name="l05386"></a><span class="lineno"> 5386</span>  (void)tmpreg;</div>
<div class="line"><a id="l05387" name="l05387"></a><span class="lineno"> 5387</span>}</div>
<div class="line"><a id="l05388" name="l05388"></a><span class="lineno"> 5388</span></div>
<div class="line"><a id="l05418" name="l05418"></a><span class="lineno"> 5418</span>__STATIC_INLINE uint32_t LL_C2_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05419" name="l05419"></a><span class="lineno"> 5419</span>{</div>
<div class="line"><a id="l05420" name="l05420"></a><span class="lineno"> 5420</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;AHB1ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05421" name="l05421"></a><span class="lineno"> 5421</span>}</div>
<div class="line"><a id="l05422" name="l05422"></a><span class="lineno"> 5422</span></div>
<div class="line"><a id="l05452" name="l05452"></a><span class="lineno"> 5452</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05453" name="l05453"></a><span class="lineno"> 5453</span>{</div>
<div class="line"><a id="l05454" name="l05454"></a><span class="lineno"> 5454</span>  CLEAR_BIT(RCC_C2-&gt;AHB1ENR, Periphs);</div>
<div class="line"><a id="l05455" name="l05455"></a><span class="lineno"> 5455</span>}</div>
<div class="line"><a id="l05456" name="l05456"></a><span class="lineno"> 5456</span></div>
<div class="line"><a id="l05486" name="l05486"></a><span class="lineno"> 5486</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05487" name="l05487"></a><span class="lineno"> 5487</span>{</div>
<div class="line"><a id="l05488" name="l05488"></a><span class="lineno"> 5488</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05489" name="l05489"></a><span class="lineno"> 5489</span>  SET_BIT(RCC_C2-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l05490" name="l05490"></a><span class="lineno"> 5490</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05491" name="l05491"></a><span class="lineno"> 5491</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l05492" name="l05492"></a><span class="lineno"> 5492</span>  (void)tmpreg;</div>
<div class="line"><a id="l05493" name="l05493"></a><span class="lineno"> 5493</span>}</div>
<div class="line"><a id="l05494" name="l05494"></a><span class="lineno"> 5494</span></div>
<div class="line"><a id="l05524" name="l05524"></a><span class="lineno"> 5524</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05525" name="l05525"></a><span class="lineno"> 5525</span>{</div>
<div class="line"><a id="l05526" name="l05526"></a><span class="lineno"> 5526</span>  CLEAR_BIT(RCC_C2-&gt;AHB1LPENR, Periphs);</div>
<div class="line"><a id="l05527" name="l05527"></a><span class="lineno"> 5527</span>}</div>
<div class="line"><a id="l05528" name="l05528"></a><span class="lineno"> 5528</span></div>
<div class="line"><a id="l05532" name="l05532"></a><span class="lineno"> 5532</span></div>
<div class="line"><a id="l05536" name="l05536"></a><span class="lineno"> 5536</span></div>
<div class="line"><a id="l05554" name="l05554"></a><span class="lineno"> 5554</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05555" name="l05555"></a><span class="lineno"> 5555</span>{</div>
<div class="line"><a id="l05556" name="l05556"></a><span class="lineno"> 5556</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05557" name="l05557"></a><span class="lineno"> 5557</span>  SET_BIT(RCC_C2-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l05558" name="l05558"></a><span class="lineno"> 5558</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05559" name="l05559"></a><span class="lineno"> 5559</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l05560" name="l05560"></a><span class="lineno"> 5560</span>  (void)tmpreg;</div>
<div class="line"><a id="l05561" name="l05561"></a><span class="lineno"> 5561</span>}</div>
<div class="line"><a id="l05562" name="l05562"></a><span class="lineno"> 5562</span></div>
<div class="line"><a id="l05580" name="l05580"></a><span class="lineno"> 5580</span>__STATIC_INLINE uint32_t LL_C2_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05581" name="l05581"></a><span class="lineno"> 5581</span>{</div>
<div class="line"><a id="l05582" name="l05582"></a><span class="lineno"> 5582</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;AHB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05583" name="l05583"></a><span class="lineno"> 5583</span>}</div>
<div class="line"><a id="l05584" name="l05584"></a><span class="lineno"> 5584</span></div>
<div class="line"><a id="l05602" name="l05602"></a><span class="lineno"> 5602</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05603" name="l05603"></a><span class="lineno"> 5603</span>{</div>
<div class="line"><a id="l05604" name="l05604"></a><span class="lineno"> 5604</span>  CLEAR_BIT(RCC_C2-&gt;AHB2ENR, Periphs);</div>
<div class="line"><a id="l05605" name="l05605"></a><span class="lineno"> 5605</span>}</div>
<div class="line"><a id="l05606" name="l05606"></a><span class="lineno"> 5606</span></div>
<div class="line"><a id="l05630" name="l05630"></a><span class="lineno"> 5630</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05631" name="l05631"></a><span class="lineno"> 5631</span>{</div>
<div class="line"><a id="l05632" name="l05632"></a><span class="lineno"> 5632</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05633" name="l05633"></a><span class="lineno"> 5633</span>  SET_BIT(RCC_C2-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l05634" name="l05634"></a><span class="lineno"> 5634</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05635" name="l05635"></a><span class="lineno"> 5635</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l05636" name="l05636"></a><span class="lineno"> 5636</span>  (void)tmpreg;</div>
<div class="line"><a id="l05637" name="l05637"></a><span class="lineno"> 5637</span>}</div>
<div class="line"><a id="l05638" name="l05638"></a><span class="lineno"> 5638</span></div>
<div class="line"><a id="l05662" name="l05662"></a><span class="lineno"> 5662</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05663" name="l05663"></a><span class="lineno"> 5663</span>{</div>
<div class="line"><a id="l05664" name="l05664"></a><span class="lineno"> 5664</span>  CLEAR_BIT(RCC_C2-&gt;AHB2LPENR, Periphs);</div>
<div class="line"><a id="l05665" name="l05665"></a><span class="lineno"> 5665</span>}</div>
<div class="line"><a id="l05666" name="l05666"></a><span class="lineno"> 5666</span></div>
<div class="line"><a id="l05670" name="l05670"></a><span class="lineno"> 5670</span></div>
<div class="line"><a id="l05674" name="l05674"></a><span class="lineno"> 5674</span></div>
<div class="line"><a id="l05716" name="l05716"></a><span class="lineno"> 5716</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05717" name="l05717"></a><span class="lineno"> 5717</span>{</div>
<div class="line"><a id="l05718" name="l05718"></a><span class="lineno"> 5718</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05719" name="l05719"></a><span class="lineno"> 5719</span>  SET_BIT(RCC_C2-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l05720" name="l05720"></a><span class="lineno"> 5720</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05721" name="l05721"></a><span class="lineno"> 5721</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l05722" name="l05722"></a><span class="lineno"> 5722</span>  (void)tmpreg;</div>
<div class="line"><a id="l05723" name="l05723"></a><span class="lineno"> 5723</span>}</div>
<div class="line"><a id="l05724" name="l05724"></a><span class="lineno"> 5724</span></div>
<div class="line"><a id="l05766" name="l05766"></a><span class="lineno"> 5766</span>__STATIC_INLINE uint32_t LL_C2_AHB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05767" name="l05767"></a><span class="lineno"> 5767</span>{</div>
<div class="line"><a id="l05768" name="l05768"></a><span class="lineno"> 5768</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;AHB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05769" name="l05769"></a><span class="lineno"> 5769</span>}</div>
<div class="line"><a id="l05770" name="l05770"></a><span class="lineno"> 5770</span></div>
<div class="line"><a id="l05812" name="l05812"></a><span class="lineno"> 5812</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05813" name="l05813"></a><span class="lineno"> 5813</span>{</div>
<div class="line"><a id="l05814" name="l05814"></a><span class="lineno"> 5814</span>  CLEAR_BIT(RCC_C2-&gt;AHB4ENR, Periphs);</div>
<div class="line"><a id="l05815" name="l05815"></a><span class="lineno"> 5815</span>}</div>
<div class="line"><a id="l05816" name="l05816"></a><span class="lineno"> 5816</span></div>
<div class="line"><a id="l05854" name="l05854"></a><span class="lineno"> 5854</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05855" name="l05855"></a><span class="lineno"> 5855</span>{</div>
<div class="line"><a id="l05856" name="l05856"></a><span class="lineno"> 5856</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05857" name="l05857"></a><span class="lineno"> 5857</span>  SET_BIT(RCC_C2-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l05858" name="l05858"></a><span class="lineno"> 5858</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05859" name="l05859"></a><span class="lineno"> 5859</span>  tmpreg = READ_BIT(RCC_C2-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l05860" name="l05860"></a><span class="lineno"> 5860</span>  (void)tmpreg;</div>
<div class="line"><a id="l05861" name="l05861"></a><span class="lineno"> 5861</span>}</div>
<div class="line"><a id="l05862" name="l05862"></a><span class="lineno"> 5862</span></div>
<div class="line"><a id="l05900" name="l05900"></a><span class="lineno"> 5900</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_AHB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05901" name="l05901"></a><span class="lineno"> 5901</span>{</div>
<div class="line"><a id="l05902" name="l05902"></a><span class="lineno"> 5902</span>  CLEAR_BIT(RCC_C2-&gt;AHB4LPENR, Periphs);</div>
<div class="line"><a id="l05903" name="l05903"></a><span class="lineno"> 5903</span>}</div>
<div class="line"><a id="l05904" name="l05904"></a><span class="lineno"> 5904</span></div>
<div class="line"><a id="l05908" name="l05908"></a><span class="lineno"> 5908</span></div>
<div class="line"><a id="l05912" name="l05912"></a><span class="lineno"> 5912</span></div>
<div class="line"><a id="l05926" name="l05926"></a><span class="lineno"> 5926</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB3_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05927" name="l05927"></a><span class="lineno"> 5927</span>{</div>
<div class="line"><a id="l05928" name="l05928"></a><span class="lineno"> 5928</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05929" name="l05929"></a><span class="lineno"> 5929</span>  SET_BIT(RCC_C2-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l05930" name="l05930"></a><span class="lineno"> 5930</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05931" name="l05931"></a><span class="lineno"> 5931</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l05932" name="l05932"></a><span class="lineno"> 5932</span>  (void)tmpreg;</div>
<div class="line"><a id="l05933" name="l05933"></a><span class="lineno"> 5933</span>}</div>
<div class="line"><a id="l05934" name="l05934"></a><span class="lineno"> 5934</span></div>
<div class="line"><a id="l05948" name="l05948"></a><span class="lineno"> 5948</span>__STATIC_INLINE uint32_t LL_C2_APB3_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l05949" name="l05949"></a><span class="lineno"> 5949</span>{</div>
<div class="line"><a id="l05950" name="l05950"></a><span class="lineno"> 5950</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;APB3ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l05951" name="l05951"></a><span class="lineno"> 5951</span>}</div>
<div class="line"><a id="l05952" name="l05952"></a><span class="lineno"> 5952</span></div>
<div class="line"><a id="l05966" name="l05966"></a><span class="lineno"> 5966</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB3_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l05967" name="l05967"></a><span class="lineno"> 5967</span>{</div>
<div class="line"><a id="l05968" name="l05968"></a><span class="lineno"> 5968</span>  CLEAR_BIT(RCC_C2-&gt;APB3ENR, Periphs);</div>
<div class="line"><a id="l05969" name="l05969"></a><span class="lineno"> 5969</span>}</div>
<div class="line"><a id="l05970" name="l05970"></a><span class="lineno"> 5970</span></div>
<div class="line"><a id="l05984" name="l05984"></a><span class="lineno"> 5984</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB3_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l05985" name="l05985"></a><span class="lineno"> 5985</span>{</div>
<div class="line"><a id="l05986" name="l05986"></a><span class="lineno"> 5986</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l05987" name="l05987"></a><span class="lineno"> 5987</span>  SET_BIT(RCC_C2-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l05988" name="l05988"></a><span class="lineno"> 5988</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l05989" name="l05989"></a><span class="lineno"> 5989</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l05990" name="l05990"></a><span class="lineno"> 5990</span>  (void)tmpreg;</div>
<div class="line"><a id="l05991" name="l05991"></a><span class="lineno"> 5991</span>}</div>
<div class="line"><a id="l05992" name="l05992"></a><span class="lineno"> 5992</span></div>
<div class="line"><a id="l06006" name="l06006"></a><span class="lineno"> 6006</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB3_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06007" name="l06007"></a><span class="lineno"> 6007</span>{</div>
<div class="line"><a id="l06008" name="l06008"></a><span class="lineno"> 6008</span>  CLEAR_BIT(RCC_C2-&gt;APB3LPENR, Periphs);</div>
<div class="line"><a id="l06009" name="l06009"></a><span class="lineno"> 6009</span>}</div>
<div class="line"><a id="l06010" name="l06010"></a><span class="lineno"> 6010</span></div>
<div class="line"><a id="l06014" name="l06014"></a><span class="lineno"> 6014</span></div>
<div class="line"><a id="l06018" name="l06018"></a><span class="lineno"> 6018</span></div>
<div class="line"><a id="l06076" name="l06076"></a><span class="lineno"> 6076</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06077" name="l06077"></a><span class="lineno"> 6077</span>{</div>
<div class="line"><a id="l06078" name="l06078"></a><span class="lineno"> 6078</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06079" name="l06079"></a><span class="lineno"> 6079</span>  SET_BIT(RCC_C2-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l06080" name="l06080"></a><span class="lineno"> 6080</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06081" name="l06081"></a><span class="lineno"> 6081</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l06082" name="l06082"></a><span class="lineno"> 6082</span>  (void)tmpreg;</div>
<div class="line"><a id="l06083" name="l06083"></a><span class="lineno"> 6083</span>}</div>
<div class="line"><a id="l06084" name="l06084"></a><span class="lineno"> 6084</span></div>
<div class="line"><a id="l06142" name="l06142"></a><span class="lineno"> 6142</span>__STATIC_INLINE uint32_t LL_C2_APB1_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l06143" name="l06143"></a><span class="lineno"> 6143</span>{</div>
<div class="line"><a id="l06144" name="l06144"></a><span class="lineno"> 6144</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;APB1LENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l06145" name="l06145"></a><span class="lineno"> 6145</span>}</div>
<div class="line"><a id="l06146" name="l06146"></a><span class="lineno"> 6146</span></div>
<div class="line"><a id="l06204" name="l06204"></a><span class="lineno"> 6204</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06205" name="l06205"></a><span class="lineno"> 6205</span>{</div>
<div class="line"><a id="l06206" name="l06206"></a><span class="lineno"> 6206</span>  CLEAR_BIT(RCC_C2-&gt;APB1LENR, Periphs);</div>
<div class="line"><a id="l06207" name="l06207"></a><span class="lineno"> 6207</span>}</div>
<div class="line"><a id="l06208" name="l06208"></a><span class="lineno"> 6208</span></div>
<div class="line"><a id="l06266" name="l06266"></a><span class="lineno"> 6266</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06267" name="l06267"></a><span class="lineno"> 6267</span>{</div>
<div class="line"><a id="l06268" name="l06268"></a><span class="lineno"> 6268</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06269" name="l06269"></a><span class="lineno"> 6269</span>  SET_BIT(RCC_C2-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l06270" name="l06270"></a><span class="lineno"> 6270</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06271" name="l06271"></a><span class="lineno"> 6271</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l06272" name="l06272"></a><span class="lineno"> 6272</span>  (void)tmpreg;</div>
<div class="line"><a id="l06273" name="l06273"></a><span class="lineno"> 6273</span>}</div>
<div class="line"><a id="l06274" name="l06274"></a><span class="lineno"> 6274</span></div>
<div class="line"><a id="l06332" name="l06332"></a><span class="lineno"> 6332</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06333" name="l06333"></a><span class="lineno"> 6333</span>{</div>
<div class="line"><a id="l06334" name="l06334"></a><span class="lineno"> 6334</span>  CLEAR_BIT(RCC_C2-&gt;APB1LLPENR, Periphs);</div>
<div class="line"><a id="l06335" name="l06335"></a><span class="lineno"> 6335</span>}</div>
<div class="line"><a id="l06336" name="l06336"></a><span class="lineno"> 6336</span></div>
<div class="line"><a id="l06356" name="l06356"></a><span class="lineno"> 6356</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP2_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06357" name="l06357"></a><span class="lineno"> 6357</span>{</div>
<div class="line"><a id="l06358" name="l06358"></a><span class="lineno"> 6358</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06359" name="l06359"></a><span class="lineno"> 6359</span>  SET_BIT(RCC_C2-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l06360" name="l06360"></a><span class="lineno"> 6360</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06361" name="l06361"></a><span class="lineno"> 6361</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l06362" name="l06362"></a><span class="lineno"> 6362</span>  (void)tmpreg;</div>
<div class="line"><a id="l06363" name="l06363"></a><span class="lineno"> 6363</span>}</div>
<div class="line"><a id="l06364" name="l06364"></a><span class="lineno"> 6364</span></div>
<div class="line"><a id="l06384" name="l06384"></a><span class="lineno"> 6384</span>__STATIC_INLINE uint32_t LL_C2_APB1_GRP2_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l06385" name="l06385"></a><span class="lineno"> 6385</span>{</div>
<div class="line"><a id="l06386" name="l06386"></a><span class="lineno"> 6386</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;APB1HENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l06387" name="l06387"></a><span class="lineno"> 6387</span>}</div>
<div class="line"><a id="l06388" name="l06388"></a><span class="lineno"> 6388</span></div>
<div class="line"><a id="l06408" name="l06408"></a><span class="lineno"> 6408</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP2_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06409" name="l06409"></a><span class="lineno"> 6409</span>{</div>
<div class="line"><a id="l06410" name="l06410"></a><span class="lineno"> 6410</span>  CLEAR_BIT(RCC_C2-&gt;APB1HENR, Periphs);</div>
<div class="line"><a id="l06411" name="l06411"></a><span class="lineno"> 6411</span>}</div>
<div class="line"><a id="l06412" name="l06412"></a><span class="lineno"> 6412</span></div>
<div class="line"><a id="l06432" name="l06432"></a><span class="lineno"> 6432</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP2_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06433" name="l06433"></a><span class="lineno"> 6433</span>{</div>
<div class="line"><a id="l06434" name="l06434"></a><span class="lineno"> 6434</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06435" name="l06435"></a><span class="lineno"> 6435</span>  SET_BIT(RCC_C2-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l06436" name="l06436"></a><span class="lineno"> 6436</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06437" name="l06437"></a><span class="lineno"> 6437</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l06438" name="l06438"></a><span class="lineno"> 6438</span>  (void)tmpreg;</div>
<div class="line"><a id="l06439" name="l06439"></a><span class="lineno"> 6439</span>}</div>
<div class="line"><a id="l06440" name="l06440"></a><span class="lineno"> 6440</span></div>
<div class="line"><a id="l06460" name="l06460"></a><span class="lineno"> 6460</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB1_GRP2_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06461" name="l06461"></a><span class="lineno"> 6461</span>{</div>
<div class="line"><a id="l06462" name="l06462"></a><span class="lineno"> 6462</span>  CLEAR_BIT(RCC_C2-&gt;APB1HLPENR, Periphs);</div>
<div class="line"><a id="l06463" name="l06463"></a><span class="lineno"> 6463</span>}</div>
<div class="line"><a id="l06464" name="l06464"></a><span class="lineno"> 6464</span></div>
<div class="line"><a id="l06468" name="l06468"></a><span class="lineno"> 6468</span></div>
<div class="line"><a id="l06472" name="l06472"></a><span class="lineno"> 6472</span></div>
<div class="line"><a id="l06511" name="l06511"></a><span class="lineno"> 6511</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB2_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06512" name="l06512"></a><span class="lineno"> 6512</span>{</div>
<div class="line"><a id="l06513" name="l06513"></a><span class="lineno"> 6513</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06514" name="l06514"></a><span class="lineno"> 6514</span>  SET_BIT(RCC_C2-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l06515" name="l06515"></a><span class="lineno"> 6515</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06516" name="l06516"></a><span class="lineno"> 6516</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l06517" name="l06517"></a><span class="lineno"> 6517</span>  (void)tmpreg;</div>
<div class="line"><a id="l06518" name="l06518"></a><span class="lineno"> 6518</span>}</div>
<div class="line"><a id="l06519" name="l06519"></a><span class="lineno"> 6519</span></div>
<div class="line"><a id="l06557" name="l06557"></a><span class="lineno"> 6557</span>__STATIC_INLINE uint32_t LL_C2_APB2_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l06558" name="l06558"></a><span class="lineno"> 6558</span>{</div>
<div class="line"><a id="l06559" name="l06559"></a><span class="lineno"> 6559</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;APB2ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l06560" name="l06560"></a><span class="lineno"> 6560</span>}</div>
<div class="line"><a id="l06561" name="l06561"></a><span class="lineno"> 6561</span></div>
<div class="line"><a id="l06599" name="l06599"></a><span class="lineno"> 6599</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB2_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06600" name="l06600"></a><span class="lineno"> 6600</span>{</div>
<div class="line"><a id="l06601" name="l06601"></a><span class="lineno"> 6601</span>  CLEAR_BIT(RCC_C2-&gt;APB2ENR, Periphs);</div>
<div class="line"><a id="l06602" name="l06602"></a><span class="lineno"> 6602</span>}</div>
<div class="line"><a id="l06603" name="l06603"></a><span class="lineno"> 6603</span></div>
<div class="line"><a id="l06641" name="l06641"></a><span class="lineno"> 6641</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB2_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06642" name="l06642"></a><span class="lineno"> 6642</span>{</div>
<div class="line"><a id="l06643" name="l06643"></a><span class="lineno"> 6643</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06644" name="l06644"></a><span class="lineno"> 6644</span>  SET_BIT(RCC_C2-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l06645" name="l06645"></a><span class="lineno"> 6645</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06646" name="l06646"></a><span class="lineno"> 6646</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l06647" name="l06647"></a><span class="lineno"> 6647</span>  (void)tmpreg;</div>
<div class="line"><a id="l06648" name="l06648"></a><span class="lineno"> 6648</span>}</div>
<div class="line"><a id="l06649" name="l06649"></a><span class="lineno"> 6649</span></div>
<div class="line"><a id="l06687" name="l06687"></a><span class="lineno"> 6687</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB2_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06688" name="l06688"></a><span class="lineno"> 6688</span>{</div>
<div class="line"><a id="l06689" name="l06689"></a><span class="lineno"> 6689</span>  CLEAR_BIT(RCC_C2-&gt;APB2LPENR, Periphs);</div>
<div class="line"><a id="l06690" name="l06690"></a><span class="lineno"> 6690</span>}</div>
<div class="line"><a id="l06691" name="l06691"></a><span class="lineno"> 6691</span></div>
<div class="line"><a id="l06695" name="l06695"></a><span class="lineno"> 6695</span></div>
<div class="line"><a id="l06699" name="l06699"></a><span class="lineno"> 6699</span></div>
<div class="line"><a id="l06731" name="l06731"></a><span class="lineno"> 6731</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB4_GRP1_EnableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06732" name="l06732"></a><span class="lineno"> 6732</span>{</div>
<div class="line"><a id="l06733" name="l06733"></a><span class="lineno"> 6733</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06734" name="l06734"></a><span class="lineno"> 6734</span>  SET_BIT(RCC_C2-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l06735" name="l06735"></a><span class="lineno"> 6735</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06736" name="l06736"></a><span class="lineno"> 6736</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l06737" name="l06737"></a><span class="lineno"> 6737</span>  (void)tmpreg;</div>
<div class="line"><a id="l06738" name="l06738"></a><span class="lineno"> 6738</span>}</div>
<div class="line"><a id="l06739" name="l06739"></a><span class="lineno"> 6739</span></div>
<div class="line"><a id="l06771" name="l06771"></a><span class="lineno"> 6771</span>__STATIC_INLINE uint32_t LL_C2_APB4_GRP1_IsEnabledClock(uint32_t Periphs)</div>
<div class="line"><a id="l06772" name="l06772"></a><span class="lineno"> 6772</span>{</div>
<div class="line"><a id="l06773" name="l06773"></a><span class="lineno"> 6773</span>  <span class="keywordflow">return</span> ((READ_BIT(RCC_C2-&gt;APB4ENR, Periphs) == Periphs) ? 1U : 0U);</div>
<div class="line"><a id="l06774" name="l06774"></a><span class="lineno"> 6774</span>}</div>
<div class="line"><a id="l06775" name="l06775"></a><span class="lineno"> 6775</span></div>
<div class="line"><a id="l06807" name="l06807"></a><span class="lineno"> 6807</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB4_GRP1_DisableClock(uint32_t Periphs)</div>
<div class="line"><a id="l06808" name="l06808"></a><span class="lineno"> 6808</span>{</div>
<div class="line"><a id="l06809" name="l06809"></a><span class="lineno"> 6809</span>  CLEAR_BIT(RCC_C2-&gt;APB4ENR, Periphs);</div>
<div class="line"><a id="l06810" name="l06810"></a><span class="lineno"> 6810</span>}</div>
<div class="line"><a id="l06811" name="l06811"></a><span class="lineno"> 6811</span></div>
<div class="line"><a id="l06843" name="l06843"></a><span class="lineno"> 6843</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB4_GRP1_EnableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06844" name="l06844"></a><span class="lineno"> 6844</span>{</div>
<div class="line"><a id="l06845" name="l06845"></a><span class="lineno"> 6845</span>  <a class="code hl_define" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t tmpreg;</div>
<div class="line"><a id="l06846" name="l06846"></a><span class="lineno"> 6846</span>  SET_BIT(RCC_C2-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l06847" name="l06847"></a><span class="lineno"> 6847</span>  <span class="comment">/* Delay after an RCC peripheral clock enabling */</span></div>
<div class="line"><a id="l06848" name="l06848"></a><span class="lineno"> 6848</span>  tmpreg = READ_BIT(RCC_C2-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l06849" name="l06849"></a><span class="lineno"> 6849</span>  (void)tmpreg;</div>
<div class="line"><a id="l06850" name="l06850"></a><span class="lineno"> 6850</span>}</div>
<div class="line"><a id="l06851" name="l06851"></a><span class="lineno"> 6851</span></div>
<div class="line"><a id="l06883" name="l06883"></a><span class="lineno"> 6883</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_C2_APB4_GRP1_DisableClockSleep(uint32_t Periphs)</div>
<div class="line"><a id="l06884" name="l06884"></a><span class="lineno"> 6884</span>{</div>
<div class="line"><a id="l06885" name="l06885"></a><span class="lineno"> 6885</span>  CLEAR_BIT(RCC_C2-&gt;APB4LPENR, Periphs);</div>
<div class="line"><a id="l06886" name="l06886"></a><span class="lineno"> 6886</span>}</div>
<div class="line"><a id="l06887" name="l06887"></a><span class="lineno"> 6887</span></div>
<div class="line"><a id="l06891" name="l06891"></a><span class="lineno"> 6891</span> </div>
<div class="line"><a id="l06892" name="l06892"></a><span class="lineno"> 6892</span><span class="preprocessor">#endif </span><span class="comment">/*DUAL_CORE*/</span><span class="preprocessor"></span></div>
<div class="line"><a id="l06893" name="l06893"></a><span class="lineno"> 6893</span></div>
<div class="line"><a id="l06897" name="l06897"></a><span class="lineno"> 6897</span></div>
<div class="line"><a id="l06901" name="l06901"></a><span class="lineno"> 6901</span> </div>
<div class="line"><a id="l06902" name="l06902"></a><span class="lineno"> 6902</span><span class="preprocessor">#endif </span><span class="comment">/* defined(RCC) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l06903" name="l06903"></a><span class="lineno"> 6903</span></div>
<div class="line"><a id="l06907" name="l06907"></a><span class="lineno"> 6907</span> </div>
<div class="line"><a id="l06908" name="l06908"></a><span class="lineno"> 6908</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l06909" name="l06909"></a><span class="lineno"> 6909</span>}</div>
<div class="line"><a id="l06910" name="l06910"></a><span class="lineno"> 6910</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l06911" name="l06911"></a><span class="lineno"> 6911</span> </div>
<div class="line"><a id="l06912" name="l06912"></a><span class="lineno"> 6912</span><span class="preprocessor">#endif </span><span class="comment">/* STM32H7xx_LL_BUS_H */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l06913" name="l06913"></a><span class="lineno"> 6913</span> </div>
<div class="line"><a id="l06914" name="l06914"></a><span class="lineno"> 6914</span> </div>
<div class="ttc" id="acore__armv81mml_8h_html_aec43007d9998a0a0e01faede4133d6be"><div class="ttname"><a href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a></div><div class="ttdeci">#define __IO</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:277</div></div>
<div class="ttc" id="astm32h7xx_8h_html"><div class="ttname"><a href="stm32h7xx_8h.html">stm32h7xx.h</a></div><div class="ttdoc">CMSIS STM32H7xx Device Peripheral Access Layer Header File.</div></div>
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